ct1775 Aeroflex Circuit Technology, ct1775 Datasheet - Page 9

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ct1775

Manufacturer Part Number
ct1775
Description
Universal Macair/1553 Dumb Rtu Hybrid Preliminary Data Sheet
Manufacturer
Aeroflex Circuit Technology
Datasheet
PIN
SCDCT1775 Rev B
10
11
12
13
14
15
16
17
18
19
20
#
1
2
3
4
5
6
7
8
9
GND
+5V OSC/
CLOCK POWER
NC
TX INHIBIT
SYNC SELECT
SERIAL DATA OUT
ESC OUT
NC
COMM / DATA SYNC
MRST
VALID WORD
BIT STATUS
LATCH DATA 1
VAL CMD WD
BDCST INH
TMADD1*
TMADD3*
XTAL
CLOCK OUT
TAKE DATA
NAME
(µA)
PIN FUNCTION AND LOADING TABLE
I
20
20
40
20
20
20
20
IH
(mA)
-0.4
-0.4
-0.8
-0.4
-0.4
-0.4
-0.4
I
IL
(mA)
I
-0.4
-0.4
-.36
-0.4
-0.4
-0.4
-1.0
-0.4
OH
(mA)
I
4.0
4.0
4.0
3.6
4.0
4.0
1.0
4.0
OL
9
Power supply and logic return.
+5V Power for oscillator and clock driver.
No connection.
A LOW on this input inhibits the transmitter.
A LOW on this input results in a transmitted DATA sync. A
HIGH on this input results in a transmitted COMMAND
(or STATUS) sync.
output when TAKE DATA is LOW.
LOW to HIGH transitions on this output when SEND
DATA is HIGH causes the transmit cycle data shifting to
occur.
No connection.
A LOW on this output indicates receipt of a DATA word. A
HIGH indicates receipt of a COMMAND (or STATUS)
word.
A LOW on this input (1 µsec minimum) resets the
decoderto its initialized condition (same function as DEC
RST), resets FAIL-SAFE, and stops and clears the transmit
cycle. This function interrupts and overridesall
othercontrols.
A LOW on this output indicates receipt of a valid word.
A LOW on this output, during wrap around self test only,
indicates that the last word decoded was identical to the last
word encoded.
A HIGH on this input causes parallel tri-state I/O data on
D8 through D15 to appear at the output of the first rank
transmit register. A LOW locks out the register inputs.
A LOW on this output indicates the receipt of a valid
command word.
A LOW on this input inhibits the indication of the
BROADCAST output flag.
Part of 5 bit hard-wired terminal address input.
Part of 5 bit herd-wired terminal address input.
A 12 MHz parallel resonant crystal is connected between
this input and ground.
Output of oscillator and clock driver (see text).
A LOW on this output indicates that received data is being
shifted into the first rank register and is available at
SERIAL DATA OUT. A LOW to HIGH transition transfers
the contents of the first rank receiver register to the second
rank register.
Received serial data in NRZ format is available at this
DESCRIPTION

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