k6e0808c1e-c Samsung Semiconductor, Inc., k6e0808c1e-c Datasheet - Page 2

• Manufacturer Part Number: k6e0808c1e-c
• Description: 32kx8 Bit High-speed Cmos Static Ram 5v Operating . Operated At Commercial And Industrial Temperature Ranges.
• Manufacturer: Samsung Semiconductor, Inc.

ORDERING INFORMATION
K6E0808C1E-C/E-L, K6E0808C1E-I/E-P
• Fast Access Time 10, 12, 15ns(Max.)
• Low Power Dissipation
• Single 5.0V 10% Power Supply
• TTL Compatible Inputs and Outputs
• I/O Compatible with 3.3V Device
• Fully Static Operation
• Three State Outputs
• 2V Minimum Data Retention : L-Ver. only
• Standard Pin Configuration
FUNCTIONAL BLOCK DIAGRAM
32K x 8 Bit High-Speed CMOS Static RAM
FEATURES
A
A
A
A
A
A
A
A
A
WE
K6E0808C1E-C10/C12/C15
K6E0808C1E-I10/I12/I15
0
1
2
3
4
5
6
7
8
OE
CS
- No Clock or Refresh required
Standby (TTL)
Operating
I/O
1
~I/O
8
(CMOS) : 2mA(Max.)
K6E0808C1E-T : 28-TSOP1-0813. 4F
K6E0808C1E-J
Clk Gen.
K6E0808C1E-10 : 80mA(Max.)
K6E0808C1E-12 : 80mA(Max.)
K6E0808C1E-15 : 80mA(Max.)
: 20mA(Max.)
Cont.
Data
Gen.
0.6mA(Max.) L-ver. Only
CLK
: 28-SOJ-300
A
9
Commercial Temp.
Industrial Temp.
Pre-Charge-Circuit
A
10
Column Select
Memory Array
64x8 Columns
I/O Circuit
512 Rows
A
11
A
12
A
13
A
14
- 2 -
The K6E0808C1E is a 262,144-bit high-speed Static Random
Access Memory organized as 32,768 words by 8 bits. The
K6E0808C1E uses 8 common input and output lines and has
an output enable pin which operates faster than address access
time at read cycle. The device is fabricated using SAMSUNG s
advanced CMOS process and designed for high-speed circuit
technology. It is particularly well suited for use in high-density
high-speed system applications. The K6E0808C1E is packaged
in a 300mil 28-pin plastic SOJ or TSOP1 forward.
PIN FUNCTION
GENERAL DESCRIPTION
Vcc
WE
OE
A
A
A
A
A
A
A
A
A
A
A
11
13
14
12
I/O
9
8
7
6
5
4
3
Pin Name
A
0
1
WE
V
V
CS
OE
- A
~ I/O
CC
SS
PIN CONFIGURATION
14
1
2
3
4
5
6
7
8
9
10
11
12
13
14
I/O
I/O
I/O
Vss
A
A
8
A
A
A
A
A
A
A
A
14
12
7
6
5
4
3
2
1
0
1
2
3
10
11
12
13
14
1
2
3
4
5
6
7
8
9
Address Inputs
Write Enable
Chip Select
Output Enable
Data Inputs/Outputs
Power(+5.0V)
Ground
TSOP1
SOJ
Pin Function
CMOS SRAM
(Top View)
For Cisco
28
27
26
25
24
23
22
21
20
19
18
17
16
15
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Vcc
WE
A
A
A
A
OE
A
CS
I/O
I/O
I/O
I/O
I/O
Feburary 1999
13
8
9
11
10
Revision 2.0
8
7
6
5
4
A
CS
I/O
I/O
I/O
I/O
I/O
Vss
I/O
I/O
I/O
A
A
A
10
0
1
2
8
7
6
5
4
3
2
1