k6e0808c1e-c Samsung Semiconductor, Inc., k6e0808c1e-c Datasheet - Page 6

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k6e0808c1e-c

Manufacturer Part Number
k6e0808c1e-c
Description
32kx8 Bit High-speed Cmos Static Ram 5v Operating . Operated At Commercial And Industrial Temperature Ranges.
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
K6E0808C1E-C/E-L, K6E0808C1E-I/E-P
TIMING WAVEFORM OF READ CYCLE(2)
TIMING WAVEFORM OF WRITE CYCLE(1)
V
Current
Address
CS
OE
Data out
Address
OE
CS
WE
Data in
Data out
CC
NOTES(READ CYCLE)
1. WE is high for read cycle.
2. All read cycle timing is referenced from the last valid address to the first transition address.
3. t
4. At any given temperature and voltage condition, t
5. Transition is measured ±200mV from steady state voltage with Load(B). This parameter is sampled and not 100% tested.
6. Device is continuously selected with CS=V
7. Address valid prior to coincident with CS transition low.
8. For common I/O applications, minimization or elimination of bus contention conditions is necessary during read and write cycle.
levels.
device.
HZ
and t
I
I
SB
OHZ
CC
are defined as the time at which the outputs achieve the open circuit condition and are not referenced to V
High-Z
t
AS(4)
t
PU
t
LZ(4,5)
(WE=V
(OE= Clock)
t
OLZ
50%
IL.
t
AA
IH
t
OHZ(6)
)
t
CO
- 6 -
t
OE
HZ
(Max.) is less than t
t
AW
t
t
RC
CW(3)
t
WC
t
WP(2)
High-Z(8)
LZ
Valid Data
(Min.) both for a given device and from device to
Valid Data
t
DW
t
t
OHZ
t
WR(5)
DH
CMOS SRAM
50%
t
t
t
PD
OH
HZ(3,4,5)
For Cisco
Feburary 1999
Revision 2.0
OH
or V
OL

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