ST62E80B STMICROELECTRONICS [STMicroelectronics], ST62E80B Datasheet - Page 49

• Manufacturer Part Number: ST62E80B
• Description: 8-BIT OTP/EPROM MCU WITH LCD DRIVER, EEPROM AND A/D CONVERTER
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

4.4 U. A. R. T. (Universal Asynchronous Receiver/Transmitter)
The UART provides the basic hardware for asyn-
chronous serial communication which, combined
with an appropriate software routine, gives a serial
interface providing communication with common
baud rates (up to 38,400 Baud with an 8MHz ex-
ternal oscillator) and flexible character formats.
Operating in Half-Duplex mode only, the UART
uses 11-bit characters comprising 1 start bit, 9 data
bits and 1 Stop bit. Parity is supported by software
only for transmit and for checking the received par-
ity bit (bit 9). Transmitted data is sent directly, while
received data is buffered allowing further data
characters to be received while the data is being
read out of the receive buffer register. Data trans-
mit has priority over data being received.
The UART is supplied with an MCU internal clock
that isalso available in WAIT mode of the processor.
Figure 25. UART Block Diagram
f
OSC
BAUD RATE x 8
INTE RRUPTS
WRIT E
READ
RX and TX
D8 D7 D6 D5 D4 D3 D2 D1 D0
DIN
CONTROL REGIST ER
RECEIV E BUFFER
PROGRAMMABLE
DATA SHIFT
BAUD RATE
DETECTOR
REGISTER
REGISTER
DIVIDE R
START
UARTOE
DOUT
D9
TXD
4.4.1 PORTS INTERFACING
RXD reception line and TXD emission line are
sharing the same external pins as two I/O lines.
Therefore, UART configuration requires to set
these two I/O lines through the relevant ports reg-
isters. The I/O line common with RXD line must be
defined as input mode (with or without pull-up)
while the I/O line common with TXD line must be
defined as output mode (Push-pull or open drain).
The transmitted data is inverted and can therefore
use a single transistor buffering stage. Defined as
input, the RXD line can be read at any time as an
I/O line during the UART operation. The TXD pin
follows I/O port registers value when UARTOE bit
is cleared, which means when no serial transmis-
sion is in progress. As a consequence, a perma-
nent high level has to be written onto the I/O port in
order to achieve a proper stop condition on the
TXD line when no transmission is active.
DR
1
0
MUX
ST62T80B/E80B
TXD1
RXD1
VR02009
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