MCM6205DJ15 MOTOROLA [Motorola, Inc], MCM6205DJ15 Datasheet

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MCM6205DJ15

Manufacturer Part Number
MCM6205DJ15
Description
32K x 9 Bit Fast Static RAM
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
32K x 9 Bit Fast Static RAM
CMOS technology. Static design eliminates the need for external clocks or timing
strobes, while CMOS circuitry reduces power consumption and provides for
greater reliability.
able in a plastic small–outline J–leaded package.
MOTOROLA FAST SRAM
REV 1
5/95
The MCM6205D is fabricated using Motorola’s high–performance silicon–gate
This device meets JEDEC standards for functionality and pinout, and is avail-
Motorola, Inc. 1994
Single 5 V
Fully Static — No Clock or Timing Strobes Necessary
Fast Access Times: 15, 20, and 25 ns
Equal Address and Chip Enable Access Times
Output Enable (G) Feature for Increased System Flexibility and to
Eliminate Bus Contention Problems
Low Power Operation: 130 – 140 mA Maximum AC
Fully TTL Compatible — Three State Output
E1
E2
DQ0
DQ8
W
A10
G
A11
A1
A3
A4
A6
A7
A9
10% Power Supply
CONTROL
DECODER
INPUT
DATA
ROW
BLOCK DIAGRAM
A0
A2
COLUMN DECODER
MEMORY MATRIX
128 x 9 COLUMNS
A5
256 ROWS x
COLUMN I/O
A8 A12 A13 A14
V CC
V SS
A0 – A14
DQ0 – DQ8
W
G
E1, E2
NC
V CC
V SS
. . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . .
MCM6205D
DQ0
DQ1
DQ2
DQ3
V
. . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . .
NC
NC
SS
A8
A7
A6
A5
A4
A3
A2
A1
A0
. . . . . . . . . . . . . . . . .
PIN ASSIGNMENT
. . . . . . . . . . . . .
. . .
PIN NAMES
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Data Input/Data Output
Power Supply (+ 5 V)
Order this document
CASE 857–02
300 MIL SOJ
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
J PACKAGE
by MCM6205D/D
No Connection
Output Enable
Address Input
Write Enable
MCM6205D
Chip Enable
V
E2
W
A14
A13
A9
A10
A11
A12
E1
DQ8
DQ7
DQ6
DQ5
DQ4
G
CC
Ground
1

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MCM6205DJ15 Summary of contents

Page 1

MOTOROLA SEMICONDUCTOR TECHNICAL DATA 32K x 9 Bit Fast Static RAM The MCM6205D is fabricated using Motorola’s high–performance silicon–gate CMOS technology. Static design eliminates the need for external clocks or timing strobes, while CMOS circuitry reduces power consumption and provides ...

Page 2

TRUTH TABLE (X = Don’t Care Mode V CC Current Not Selected Not Selected Output Disabled Read ...

Page 3

CAPACITANCE ( MHz Periodically sampled rather than 100% tested) Characteristic Address Input Capacitance Control Pin Input Capacitance (E1, E2 I/O Capacitance AC OPERATING CONDITIONS AND CHARACTERISTICS (V ...

Page 4

A (ADDRESS) Q (DATA OUT) PREVIOUS DATA VALID A (ADDRESS) E (CHIP ENABLE) G (OUTPUT ENABLE) HIGH–Z Q (DATA OUT) t ELICCH SUPPLY I SB CURRENT MCM6205D 4 READ CYCLE 1 (See Note 8) t AVAV ...

Page 5

WRITE CYCLE 1 (W Controlled, See Notes 1, 2, and 3) Parameter Write Cycle Time Address Setup Time Address Valid to End of Write Write Pulse Width Write Pulse Width, G High Data Valid to End of Write Data Hold ...

Page 6

... If E goes high coincident with or before W goes high, the output will remain in a high impedance state. WRITE CYCLE 2 A (ADDRESS) E (CHIP ENABLE) W (WRITE ENABLE) D (DATA IN) Q (DATA OUT) MCM Motorola Memory Prefix Part Number Full Part Numbers — MCM6205DJ15 MCM6205D 6 MCM6205D–15 MCM6205D–20 Symbol Min Max Min t AVAV 15 — ...

Page 7

- -X- NOTE 3 0.10 (0.004) DETAIL Z K -T- SEATING PLANE Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee ...

Page 8

Literature Distribution Centers: USA/EUROPE: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. JAPAN: Nippon Motorola Ltd.; 4-32–1, Nishi–Gotanda, Shinagawa–ku, Tokyo 141, Japan. ASIA PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center, No. 2 Dai King Street, Tai Po Industrial ...

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