ADN2860-EVAL AD [Analog Devices], ADN2860-EVAL Datasheet - Page 11

• Manufacturer Part Number: ADN2860-EVAL
• Description: 3-Channel Digital Potentiometer with Nonvolatile Memory
• Manufacturer: AD [Analog Devices]

EEPROM INTERFACE
The 256 bytes of EEPROM memory provided in the ADN2860
are organized into 16 pages of 16 bytes each. The word size of
each memory location is one byte wide.
The I
where A1E and A0E are external pin-programmable address
bits. The 2-pin programmable address bits allow a total of four
ADN2860 devices to be controlled by a single I
each having its own EEPROM.
An internal 8-bit address counter for the EEPROM is
automatically incremented following each read or write
operation. For read operations, the address counter is
incremented after each byte is read, and the counter rolls over
from Address 255 to 0.
For write operations, the address counter is incremented after
each byte is written. The counter rolls over from the highest
address of the current page to the lowest address of the current
page. For example, writing two bytes beginning at Address 31
causes the counter to roll back to Address 16 after the first byte
is written; then the address increments to 17 after the second
byte is written.
EEPROM Write
Each write operation issued to the EEPROM programs between
1 byte and 16 bytes (one page) of memory. Figure 19 shows the
EEPROM write interface. The number of bytes of data, N, that
the user wants to send to the EEPROM is unrestricted. If more
S
S
S
2
C slave address of the EEPROM is 10100(A1E)(A0E),
1
1
SLAVE ADDRESS
0
0
EEPROM SLAVE ADDRESS
EEPROM SLAVE ADDRESS
1
1
0
0
0 WRITE
0
0
W
A
E
E
1
A
1
A
A
0
E
E
A
0
0 WRITE
1 READ
0
0
MEMORY ADDRESS
A
A
2
C master bus,
Figure 21. EEPROM Random Read
Figure 20. EEPROM Current Read
MEMORY ADDRESS
Figure 19. EEPROM Write
Rev. A | Page 11 of 20
MEMORY DATA
A
REPEATED START
S
than 16 bytes of data are sent in a single write operation, the
address counter rolls back to the beginning address, and the
previously sent data is overwritten.
EEPROM Write-Acknowledge Polling
After each write operation, an internal EEPROM write cycle
begins. During the EEPROM internal write cycle, the I
interface of the device is disabled. It is necessary to determine if
the internal write cycle is complete and whether the I
interface is enabled. To do so, execute I
sending a start condition, followed by the EEPROM slave
address plus the desired R/ W bit. If the ADN2860 I
responds with an ACK, the write cycle is complete and the
interface is ready to proceed with further operations.
Otherwise, the I
whether the write cycle has been completed.
EEPROM Read
The ADN2860 EEPROM provides two different read
operations, shown in Figure 20 and Figure 21. The number of
bytes, N, read from the EEPROM in a single operation is
unrestricted. If more than 256 bytes are read, the address
counter rolls back to the start address, and data previously read
is read again.
Figure 20 shows the EEPROM current read operation. This
operation does not allow an address location to be specified,
and reads data beginning at the current address location stored
in the internal address counter.
SLAVE ADDRESS
(N BYTES + ACKNOWLEDGE)
A
A
2
C interface must be polled again to determine
1 READ
MEMORY DATA
R
A
MEMORY DATA
(N BYTES + ACKNOWLEDGE)
(N BYTES + ACKNOWLEDGE)
MEMORY DATA
A
2
C interface polling by
MEMORY DATA
ADN2860
2
C interface
A/A
2
C
2
C
A/A
A
P
P
P