ADN2860-EVAL AD [Analog Devices], ADN2860-EVAL Datasheet - Page 12

• Manufacturer Part Number: ADN2860-EVAL
• Description: 3-Channel Digital Potentiometer with Nonvolatile Memory
• Manufacturer: AD [Analog Devices]

ADN2860
A random read operation is shown in Figure 21. This operation
changes the address counter to the specified memory address by
performing a dummy write and then performing a read
operation beginning at the new address counter location.
RDAC I
Table 5. RDAC Register Addresses (CMD/ REG = 0, EE/ RDAC = 0)
A4
0
0
0
0
0
0
1
S
S
S
0
0
SLAVE ADDRESS
A3
0
0
0
0
0
0
1
2
C INTERFACE
1
1
RDAC SLAVE ADDRESS
RDAC SLAVE ADDRESS
0
0
…to…
A2
0
0
0
0
1
1
1
S
1
1
0
0 WRITE
1
1
A1
0
0
1
1
0
0
1
W
1
R
A
R
A
1
1
RDAC SLAVE ADDRESS
0
A0
0
1
0
1
0
1
1
A
R
R
A
0
A
0
0 WRITE
1 READ
1
0
1
RDAC ADDRESS
1
A
A
RDAC
RDAC0
RDAC0
RDAC1
RDAC1
RDAC2
R
A
1
CMD/
REG
RDAC EEPROM OR REGISTER DATA
Figure 25. RDAC Shortcut Commands
R
A
0
Figure 24. RDAC Random Read
0 WRITE
Figure 23. RDAC Current Read
0
0
Figure 22. RDAC Write
Byte Description
(D7)(D6)(D5)(D4)(D3)(D2)(D1)(D0)—RDAC0 8 LSBs
(X)(X)(X)(X)(X)(X)(X)(D8)—RDAC0 MSB
(D7)(D6)(D5)(D4)(D3)(D2)(D1)(D0)—RDAC1 8 LSBs
(X)(X)(X)(X)(X)(X)(X)(D8)—RDAC1 MSB
(X)(D6)(D5)(D4)(D3)(D2)(D1)(D0)—RDAC2 7 bits
Reserved
Rev. A | Page 12 of 20
EE/
RD
AC
A
RDAC ADDRESS
REPEATED START
A
1 CMD
S
A
4
CMD/
REG
EEPROM Write Protection
Setting the WP pin to logic low protects the EEPROM memory
from future write operations. In this mode, EEPROM read
operations and RDAC register loading operate normally.
A
3
SLAVE ADDRESS
C
3
A
2
(N BYTES + ACKNOWLEDGE)
C
2
A
1
C
1
A
A
0
1 READ
A
C
0
R
RDAC EEPROM OR REGISTER DATA
A
2
DATA
A
A
1
(N BYTES + ACKNOWLEDGE)
(N BYTES + ACKNOWLEDGE)
A
0
RDAC DATA
A
A
P
DATA
A/A
A/A
A
P
P
P