LTC1092 LINER [Linear Technology], LTC1092 Datasheet - Page 16

• Manufacturer Part Number: LTC1092
• Description: 1-, 2-, 6- and 8-Channel, 10-Bit Serial I/O Data Acquisition Systems
• Manufacturer: LINER [Linear Technology]

3. Accommodating Microprocessors with
The LTC1091/LTC1093/LTC1094 will fill zeros indefinitely
after the transmitted data until CS is brought high. At that
time the D
to MPU serial ports with different transfer increments
including 4 bits (e.g., COP400) and 8 bits (e.g., SPI and
MICROWIRE/PLUS
dated by the correct positioning of the start bit in the
LTC1091 input word.
Figure 1 shows examples of LTC1091 input and output
words for 4-bit and 8-bit processors. A complete data
exchange can be implemented with two 4-bit MPU outputs
and three inputs in 4-bit systems and one 8-bit output and
two inputs in 8-bit systems. The resulting data winds up
left justified in the MPU with zeros automatically filled in
the unused low order bits by the LTC1091. In section 5
another example is given using the MC68HC05C4 which
MICROWIRE/PLUS is a trademark of National Semiconductor Corp.
A
TRANSFERS
TRANSFERS
16
LTC1091/LTC1092
LTC1093/LTC1094
PPLICATI
Different Word Lengths
4-BIT
8-BIT
MPU READS BACK
MPU READS BACK
OUT
3 D
2 D
2 D
1 D
MPU SENDS
OUT
MPU SENDS
OUT
IN
line is disabled. This makes interfacing easy
Figure 1. LTC1091 Input and Output Word Arrangements for 4-Bit and 8-Bit Serial Port Microprocessors
IN
WORDS
WORDS
WORDS
WORD
D
O
OUT
CLK
D
CS
IN
TM
U
). Any word length can be accommo-
S
0
0
I FOR ATIO
U
0
0
0
0
START
START
START
Hi-Z
BIT
BIT
1
1
W
SGL/
DIFF
SGL/
SGL/
DIFF
DIFF
ODD/
SIGN
ODD/
SIGN
ODD/
SIGN
MSBF
MSBF X
MSBF X
U
B9
B9
• • •
B9
B8
B8
B8
eliminates one 8-bit transfer and positions data right
justified inside the MPU.
4. Operation with D
The LTC1091/LTC1093/LTC1094 can be operated with
D
required to communicate to the MPU. Data is transmitted
in both directions on a single wire. The processor pin
connected to this data line should be configurable as either
an input or an output. The LTC1091, for example, will take
control of the data line and drive it low on the 4th falling
CLK edge after the start bit is received (see Figure 2).
Therefore, the processor port line must be switched to an
input before this happens, to avoid a conflict.
In the next section, an example is made of interfacing
the LTC1091 with D
8051 MPU.
B7
B7
B7
IN
and D
B6
B6
B6
B5
B5
B5
OUT
B4
B4
B4
tied together. This eliminates one of the lines
B3
B3
B3
B2
IN
B2
B2
IN
and D
and D
B1
B1
B1
B0
B0
B0
OUT
OUT
0
0
tied together to the Intel
Tied Together
0
0
X = DON’T CARE
FILL ZEROS
0
0
0
1091/2/3/4 F01
0