LTC1098 LINER [Linear Technology], LTC1098 Datasheet - Page 13

• Manufacturer Part Number: LTC1098
• Description: Micropower Sampling 8-Bit Serial I/O A/D Converters
• Manufacturer: LINER [Linear Technology]

A
Power Down and Wake-Up Time
The LTC1096(L)/LTC1098(L) draw power when the CS pin
is low and shut themselves down when that pin is high. In
order to have a correct conversion result, a 10 s wake-up
time must be provided from CS falling to the first falling
clock (CLK) after the first rising CLK for the LTC1096(L)
and from CS falling to the MSBF bit CLK falling for the
LTC1098(L) (see Operating Sequence). If the LTC1096(L)/
LTC1098(L) are running with clock frequency less than or
equal to 100kHz, the wake-up time is inherently provided.
Example
Two cases are shown at right to illustrate the relationship
among wake-up time, setup time and CLK frequency for
the LT1096(L).
In Case 1 the clock frequency is 100kHz. One clock cycle
is 10 s which can be the wake-up time, while half of that
can be the setup time. In Case 2 the clock frequency is
50kHz, half of the clock cycle plus the setup time (=1 s)
can be the wake-up time. If the CLK frequency is higher
PPLICATI
D
D
OUT
CLK
CLK
OUT
CS
CS
*AFTER COMPLETING THE DATA TRANSFER, IF FURTHER CLOCKS ARE APPLIED WITH CS LOW, THE ADC WILL OUTPUT ZEROS INDEFINITELY.
Hi-Z
O
U
HI-Z
t
WAKEUP
t
WAKEUP
S
t
t
suCS
suCS
I FOR ATIO
U
NULL
BIT
NULL
BIT
W
(MSB)
(MSB)
B7
B7
Figure 1. LTC1096(L) Operating Sequence
B6
B6
t
U
CYC
t
B5
B5
t
CONV
CONV
B4
B4
B3
B3
t
CYC
B2
B2
than 100kHz, Figure 1 shows the relationship between the
wake-up time and setup time.
The wake-up time is inherently provided for the LTC1098(L)
with setup time = 1 s (see Figure 2).
D
D
CLK
CLK
OUT
OUT
CS
CS
B1
B1
B0
B0
B1
POWER
DOWN
t
su
t
su
Hi-Z
t
WAKEUP
t
WAKEUP
B2
10µs
Case 1. Timing Diagram
Case 2. Timing Diagram
B3
LTC1096/LTC1096L
LTC1098/LTC1098L
B4
B5
B6
NULL BIT
B7*
POWER
DOWN
Hi-Z
LTC1096/98 F01
LTC1096/98 • AI Ex.
13
B7