LT1019A-10 LINER [Linear Technology], LT1019A-10 Datasheet - Page 11

• Manufacturer Part Number: LT1019A-10
• Description: Dual Current Output 12-/14-/16-Bit SoftSpan DACs with Parallel I/O
• Manufacturer: LINER [Linear Technology]

output the contents of the selected register (see Table
1). For single-span operation, readback of the span I/O
pins is disabled.
UPD (Pin 36): Update and Buffer Select Pin. When READ
is held low and UPD is asserted high, the contents of the
addressed DAC’s input registers (both data and span) are
copied into their respective DAC registers. The output of the
DAC is updated, refl ecting the new DAC register values.
When READ is held high, the update function is disabled
and the UPD pin functions as a buffer selector—logic low
to select the input register, high to select the DAC register.
See Readback in the Operation section.
WR (Pin 37): Active Low Write Pin. A Write operation cop-
ies the data present on the data or span I/O pins (D0-D15
or S0-S2, respectively) into the associated input register.
When READ is high, the Write function is disabled.
S1 (Pin 38): Span I/O Bit 1. Pins S0, S1 and S2 are used
to program and to read back the output ranges of the
DACs.
REFB (Pin 39): Reference Input for DAC B. The impedance
looking into this pin is 10k to ground. For normal opera-
tion tie to the output of the reference inverting amplifi er.
Typically –5V; accepts up to ±15V.
R
pin provides the translation of the output voltage range for
bipolar spans. Accepts up to ±15V; for normal operation
tie to the positive reference voltage at R
impedance looking into this pin is 20k to ground.
R
operation tie to the output of the I/V converter amplifi er
for DAC B (see Typical Applications). The DAC output
current from I
to the R
10k to ground.
I
ground when the DAC is operating and should reside at
PIN FUNCTIONS
OUT1B
OFSB
FBB
(Pin 41): DAC B Feedback Resistor. For normal
(Pin 42): DAC B Current Output. This pin is a virtual
(Pin 40): Bipolar Offset Network for DAC B. This
FBB
pin. The impedance looking into this pin is
OUT1B
fl ows through the feedback resistor
IN
(Pin 2). The
0V. For normal operation tie to the negative input of the I/V
converter amplifi er for DAC B (see Typical Applications).
R
is ±5V. The impedance looking into this pin is 1M to ground.
If not used, tie R
R
is ±5V. The impedance looking into this pin is 1M to ground.
If not used, tie R
I
ground when the DAC is operating and should reside at
0V. For normal operation tie to the negative input of the I/V
converter amplifi er for DAC A (see Typical Applications).
R
operation tie to the output of the I/V converter amplifi er
for DAC A (see Typical Applications). The DAC output
current from I
to the RFBA pin. The impedance looking into this pin is
10k to ground.
R
pin provides the translation of the output voltage range for
bipolar spans. Accepts up to ±15V; for normal operation
tie to the positive reference voltage at R
impedance looking into this pin is 20k to ground.
REFA (Pin 48): Reference Input for DAC A, and connec-
tion for internal reference inverting resistor R2. The 20k
resistor R2 is connected internally from R
normal operation tie this pin to the output of the reference
inverting amplifi er (see Typical Applications). Typically –5V;
accepts up to ±15V. The impedance looking into this pin
is 10k to ground (R
Exposed Pad (Pin 49): Ground. The Exposed Pad must
be soldered to the PCB.
OUT1A
VOSB
VOSA
FBA
OFSA
(Pin 46): DAC A Feedback Resistor. For normal
(Pin 43): DAC B Offset Adjust. Nominal input range
(Pin 44): DAC A Offset Adjust. Nominal input range
(Pin 45): DAC A Current Output. This pin is a virtual
(Pin 47): Bipolar Offset Network for DAC A. This
OUT1A
VOSB
VOSA
IN
fl ows through the feedback resistor
to ground.
to ground.
and R
COM
fl oating).
LTC2753
COM
IN
(Pin 2). The
to REFA. For
11
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