LT1019A-10 LINER [Linear Technology], LT1019A-10 Datasheet - Page 16

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LT1019A-10

Manufacturer Part Number
LT1019A-10
Description
Dual Current Output 12-/14-/16-Bit SoftSpan DACs with Parallel I/O
Manufacturer
LINER [Linear Technology]
Datasheet
LTC2753
OPERATION
System Offset Adjustment
Many systems require compensation for overall system
offset. The R
provided for this purpose. For noise immunity and ease
of adjustment, the control voltage is attenuated to the
DAC output:
V
V
spans]
V
The nominal input range of this pin is ±5V; other reference
voltages of up to 15V may be used if needed. The R
pins have an input impedance of 1MΩ. To preserve the
settling performance of the LTC2753, drive this pin with a
Thevenin-equivalent impedance of 10k or less. Short any
unused system offset adjustment pins to I
16
OS
OS
OS
= –0.01 • V(R
= –0.04 • V(R
= –0.02 • V(R
VOSA
VOSX
VOSX
and R
VOSX
) [0V to 5V, ±2.5V spans]
) [±10V span]
) [0V to 10V, ±5V, –2.5V to 7.5V
VOSB
offset adjustment pins are
OUT2
.
VOSX
Table 2. Span Codes
Codes not shown are reserved and should not be used.
Table 3. Address Codes
Codes not shown are reserved and should not be used.
*If readback is taken using the All DACs address, the LTC2753 defaults to
DAC A.
S2
0
0
0
0
1
1
DAC CHANNEL
S1
0
0
1
1
0
0
ALL*
A
B
S0
0
1
0
1
0
1
SPAN
Unipolar 0V to 5V
Unipolar 0V to 10V
Bipolar –5V to 5V
Bipolar –10V to 10V
Bipolar –2.5V to 2.5V
Bipolar –2.5V to 7.5V
A1
0
0
1
A0
0
1
1
2753f

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