LTC1418 LINER [Linear Technology], LTC1418 Datasheet - Page 8

• Manufacturer Part Number: LTC1418
• Description: Low Power, 14-Bit, 200ksps ADC with Serial and Parallel I/O
• Manufacturer: LINER [Linear Technology]

FUNCTIONAL BLOCK DIAGRA
APPLICATIONS
LTC1418
CONVERSION DETAILS
The LTC1418 uses a successive approximation algorithm
and an internal sample-and-hold circuit to convert an
analog signal to a 14-bit parallel or serial output. The ADC
is complete with a precision reference and an internal
clock. The control logic provides easy interface to micro-
processors and DSPs (please refer to Digital Interface
section for the data format).
Conversion start is controlled by the CS and CONVST
inputs. At the start of the conversion the successive
approximation register (SAR) is reset. Once a conversion
cycle has begun it cannot be restarted.
During the conversion, the internal differential 14-bit
capacitive DAC output is sequenced by the SAR from the
most significant bit (MSB) to the least significant bit (LSB).
8
REFCOMP
DGND
AGND
U
V
A
A
REF
IN
IN
+
–
NOTE: PIN NAMES IN PARENTHESES
2.5V
4.096V
U
INTERNAL
REFER TO SERIAL MODE
CLOCK
8k
D4 (EXTCLKIN)
U
REF AMP
2.5V REF
INFORMATION
U
D0 (EXT/INT)
MUX
W
SHDN
SUCCESSIVE APPROXIMATION
14-BIT CAPACITIVE DAC
CONVST RD CS
C
C
CONTROL LOGIC
SAMPLE
SAMPLE
U
W
REGISTER
SER/PAR
A
A
D2/(CLKOUT)
IN
IN
+
–
SAMPLE
SAMPLE
ZEROING SWITCHES
BUSY
+
–
Figure 1. Simplified Block Diagram
V
COMP
DAC
14
+
V
HOLD
HOLD
DAC
REGISTER
–
SHIFT
C
C
SAMPLE
SAMPLE
C
C
DAC
DAC
+
–
+
–
SAR
1418 BD
ZEROING SWITCHES
•
•
•
+
–
14
D13
D0
D3/(SCLK)
V
V
D1/(D
COMP
HOLD
HOLD
DD
SS
: 0V FOR UNIPOLAR MODE
: 5V
– 5V FOR BIPOLAR MODE
OUT
OUTPUT
LATCH
)
1418 F01
D13
D0