LTC1539 LINER [Linear Technology], LTC1539 Datasheet - Page 18

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LTC1539

Manufacturer Part Number
LTC1539
Description
Dual High Efficiency, Low Noise, Synchronous Step-Down Switching Regulators
Manufacturer
LINER [Linear Technology]
Datasheet

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APPLICATIONS
LTC1538-AUX/LTC1539
18
Phase-Locked Loop and Frequency Synchronization
The LTC1539 has an internal voltage-controlled oscillator
and phase detector comprising a phase-locked loop. This
allows the top MOSFET turn-on to be locked to the rising
edge of an external source. The frequency range of the
voltage-controlled oscillator is 30% around the center
frequency f
The value of C
frequency (f
(V
Stating the frequency as a function of V
The phase detector used is an edge sensitive digital type
which provides zero degrees phase shift between the
PLLLPF
C
Frequency kHz
C
OSC
OSC
= 1.19V):
( )
pF
Figure 7. Operating Frequency vs V
1.3
0.7
pF
f
O
O
O
.
0
). Assuming the phase-locked loop is locked
OSC
(
Frequency kHz
11
is calculated from the desired operating
0.5
)
U
2 1 10
17
.
INFORMATION
1.0
V
8 4 10
PLLLPF
U
A
4
.
(
18
(V)
1.5
8
)
1
A
11
W
2.0
V
PLLLPF
2 4
1538 F07
.
PLLLPF
PLLLPF
V
2.5
U
and C
2000
OSC
:
external and internal oscillators. This type of phase detec-
tor will not lock up on input frequencies close to the
harmonics of the VCO center frequency. The PLL hold-in
range, f
The output of the phase detector is a complementary pair
of current sources charging or discharging the external
filter network on the PLL LPF pin. A simplified block
diagram is shown in Figure 8.
If the external frequency f
tor frequency f
ing up the PLL LPF pin. When the external frequency is less
than f
PLL LPF pin. If the external and internal frequencies are the
same but exhibit a phase difference, the current sources
turn on for an amount of time corresponding to the phase
difference. Thus the voltage on the PLL LPF pin is adjusted
until the phase and frequency of the external and internal
oscillators are identical. At this stable operating point the
phase comparator output is open and the filter capacitor
C
driven from a low impedance such as a logic gate located
close to the pin. Any external attenuator used needs to be
referenced to SGND.
The loop filter components C
current pulses from the phase detector and provide a
*PLLIN
LP
SGND
FREQUENCY
50k
EXTERNAL
*LTC1539 ONLY
f
holds the voltage. The LTC1539 PLLIN pin must be
H
0SC
= f
Figure 8. Phase-Locked Loop Block Diagram
, current is sunk continuously, pulling down the
H
, is equal to the capture range, f
C
DETECTOR*
FREQUENCY
DETECTOR
= 0.3 f
PHASE
DIGITAL
PHASE/
OSC
, current is sourced continuously, pull-
O
.
2.4V
PLLIN
is greater than the oscilla-
LP
, R
R
*PLL LPF
LP
LP
OSC
smooth out the
C
LP
1538 F08
C:
C
OSC
C
OSC

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