LTC1773 LINER [Linear Technology], LTC1773 Datasheet - Page 11

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LTC1773

Manufacturer Part Number
LTC1773
Description
Synchronous Step-Down DC/DC Controller
Manufacturer
LINER [Linear Technology]
Datasheet

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APPLICATIONS
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
where L1, L2, etc. are the individual losses as a percentage
of input power.
Synchronous switching removes the normal limitation
that power must be drawn from the inductor primary
winding in order to extract power from auxiliary windings.
With continuous synchronous operation, power can be
drawn from the auxiliary windings without regard to the
primary output load.
The secondary output voltage is set by the turns ratio of the
transformer in conjunction with a pair of external resistors
returned to the SYNC/FCB pin as shown in Figure 5. The
secondary regulated voltage, V
where N is the turns ratio of the transformer and V
the main output voltage sensed by V
V
R4
R3
SEC
Efficiency = 100% – (L1 + L2 + L3 + ...)
Figure 5. Secondary Output Loop Connection
SYNC/FCB
(
LTC1773
N
+
1
SW
TG
BG
)
V
U
OUT
INFORMATION
U
V
V
IN
DIODE
SEC
>
, in Figure 5 is given by:
W
0 8 1
FB
.
1:N
L1
V
.
+
+
R
R
U
4
3
+
C
OUT
1773 F05
1µF
V
V
OUT
SEC
OUT
is
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1773 circuits: V
power MOSFET gate charge current, I
topside MOSFET transition losses.
1. The V
2. The external MOSFET gate charge current results from
3. I
R
4. Transition losses apply to the topside MOSFET and
SW
as given in the electrical characteristics, it excludes
MOSFET driver and control currents. V
in a small loss which increases with V
switching the gate capacitance of the external power
MOSFET switches. Each time the gate is switched from
high to low to high again, a packet of charge dQ moves
from V
out of V
In continuous mode, I
and Q
synchronous switches. Both the DC bias and gate
charge losses are proportional to V
effects will be more pronounced at higher supply volt-
ages.
external R
and the external inductor (R
average output current flowing through inductor L is
“chopped” between the main switch and the synchro-
nous switch. Thus, the series resistance looking into
the SW pin from L is a function of both top and bottom
MOSFET R
The R
be obtained from the MOSFET manufactures’s
datasheets. Thus, to obtain I
and R
the average output current.
increase when operating at high input voltages and
higher operating frequencies. Transition losses can be
estimated from:
Transition Loss = 2(V
2
R losses are calculated from the resistances of the
= (R
IN
DS(ON)
L
B
DS(ON)TOP
IN
together and multiply their sum by the square of
IN
quiescent current is due to the DC bias current
are the gate charges of the external main and
to ground. The resulting dQ/dt is the current
; it is typically larger than the DC bias current.
SENSE
DS(ON)
for both the top and bottom MOSFETs can
, the external power MOSFETs (R
+R
and the duty cycle (DC), as follows:
SENSE
IN
GATECHG
)
2
) • DC + R
I
IN
O(MAX)
L
quiescent current, external
2
). In continuous mode, the
R losses, simply add R
= f(Q
C
RSS
DS(ON)BOT
T
LTC1773
IN
IN
(f)
2
IN
+ Q
R losses, and
current results
and thus their
.
B
) where Q
• (1 – DC)
11
1773fb
SW
SW
T
)

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