LTC2246 LINER [Linear Technology], LTC2246 Datasheet
LTC2246
Available stocks
Related parts for LTC2246
LTC2246 Summary of contents
Page 1
... A/D converters designed for digitizing high frequency, wide dynamic range signals. The LTC2248/LTC2247/LTC2246 are perfect for demand- ing imaging and communications applications with AC performance that includes 74.3dB SNR and 90dB SFDR for signals at the Nyquist frequency. ...
Page 2
... Analog Input Voltage (Note 3) ..... –0. Digital Input Voltage .................... –0. Digital Output Voltage ................ –0.3V to (OV Power Dissipation ............................................ 1500mW Operating Temperature Range LTC2248C, LTC2247C, LTC2246C ........... 0°C to 70°C LTC2248I, LTC2247I, LTC2246I ..........–40°C to 85°C Storage Temperature Range ..................–65°C to 125° VERTER CHARACTERISTICS ...
Page 3
... MIN TYP MAX ±0.5V to ±1V ● ● 1 1.5 1.9 ● 0.5 1.5 ● –1 ● –3 ● –3 0 0.2 80 575 LTC2247 LTC2246 MIN TYP MAX MIN TYP MAX 74.4 74.5 72.9 74.2 72.9 74.4 73.9 73.4 73 ...
Page 4
... MIN TYP MAX ● 2 ● 0.8 ● – 2.995 ● 2.7 2.99 0.005 ● 0.09 0.4 2.49 0.09 1.79 0.09 LTC2247 LTC2246 MIN TYP MAX MIN TYP MAX 2.7 3 3.4 2.7 3 3.4 0.5 3 3.6 0 120 144 UNITS V ppm/° ...
Page 5
... Note 6: Offset error is the offset voltage measured from –0.5 LSB when the output code flickers between 00 0000 0000 0000 and 11 1111 1111 1111. , they Note 7: Guaranteed by design, not subject to test. DD Note 3V without latchup. 25MHz (LTC2246), input range = 1V Note 9: Recommended operating conditions. LTC2248: Typical DNL, 2V Range, 65Msps 1.00 0.75 0.50 0.25 0 –0.25 – ...
Page 6
... LTC2248/LTC2247/LTC2246 W U TYPICAL PERFOR A CE CHARACTERISTICS LTC2248: 8192 Point FFT 5MHz, –1dB, 2V Range, IN 65Msps 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 FREQUENCY (MHz) LTC2248: 8192 Point FFT 70MHz, –1dB, 2V Range, IN 65Msps 0 –10 –20 –30 – ...
Page 7
... LTC2247: Typical INL, 2V Range, 40Msps 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 0 4096 8192 12288 16384 CODE 2247 G01 LTC2248/LTC2247/LTC2246 LTC2248: SNR and SFDR vs Clock Duty Cycle, 65Msps 100 SFDR: DCS SFDR: DCS OFF 85 80 SNR: DCS ON 75 SNR: DCS OFF ...
Page 8
... LTC2248/LTC2247/LTC2246 W U TYPICAL PERFOR A CE CHARACTERISTICS LTC2247: 8192 Point FFT 30MHz, –1dB, 2V Range, IN 40Msps 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 FREQUENCY (MHz) 2247 G04 LTC2247: 8192 Point 2-Tone FFT 21.6MHz and 23.6MHz, IN –1dB, 2V Range, 40Msps 0 – ...
Page 9
... LTC2247 Sample Rate, OVDD 5MHz Sine Wave Input, –1dB 1.8V VDD SAMPLE RATE (Msps) 2247 G14 LTC2246: 8192 Point FFT 5MHz, –1dB, 2V Range, IN 25Msps 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 16384 ...
Page 10
... SAMPLE RATE (Msps) LTC2246: SNR vs Input Frequency, –1dB, 2V Range, 25Msps 278 100 INPUT FREQUENCY (MHz) 2246 G08 LTC2246: SNR vs Input Level 5MHz, 2V Range, 25Msps IN 80 dBFS dBc –60 –50 –40 –30 –20 ...
Page 11
... Connecting SHDN to V results in sleep mode with the outputs at high impedance. OE (Pin 11): Output Enable Pin. Refer to SHDN pin function. LTC2248/LTC2247/LTC2246 D0 – D13 (Pins 12, 13, 14, 15, 16, 17, 18, 19, 22, 23, 24, 25, 26, 27): Digital Outputs. D13 is the MSB. OGND (Pin 20): Output Driver Ground. ...
Page 12
... LTC2248/LTC2247/LTC2246 U U FUNCTIONAL BLOCK DIAGRA + A IN INPUT FIRST PIPELINED S/H – ADC STAGE 1.5V CM REFERENCE 2.2µF RANGE SELECT REF SENSE BUF DIAGRA ANALOG N INPUT CLK D0-D13 SECOND PIPELINED THIRD PIPELINED FOURTH PIPELINED ADC STAGE ADC STAGE ADC STAGE ...
Page 13
... SNR JITTER CONVERTER OPERATION As shown in Figure 1, the LTC2248/LTC2247/LTC2246 is a CMOS pipelined multistep converter. The converter has six pipelined ADC stages; a sampled analog input will result in a digitized value five cycles later (see the Timing Diagram section). For optimal AC performance the analog inputs should be driven differentially ...
Page 14
... SAMPLE/HOLD OPERATION AND INPUT DRIVE Sample/Hold Operation Figure 2 shows an equivalent circuit for the LTC2248/ LTC2247/LTC2246 CMOS differential sample-and-hold. The analog inputs are connected to the sampling capaci- tors (C ) through NMOS transistors. The capacitors SAMPLE ...
Page 15
... Poor matching will result in higher even order harmonics, especially the second. Input Drive Circuits Figure 3 shows the LTC2248/LTC2247/LTC2246 being driven transformer with a center tapped second- ary. The secondary center tap is DC biased with V setting the ADC input signal at its optimum DC level. ...
Page 16
... Input Frequencies Above 300MHz Reference Operation Figure 9 shows the LTC2248/LTC2247/LTC2246 refer- ence circuitry consisting of a 1.5V bandgap reference, a difference amplifier and switching and control circuit. The internal voltage reference can be configured for two pin selectable input ranges of 2V (±1V differential (± ...
Page 17
... U a low-jitter squaring circuit before the CLK pin (see Figure 11). The noise performance of the LTC2248/LTC2247/LTC2246 can depend on the clock signal quality as much as on the analog input. Any noise present on the clock signal will result in additional aperture jitter that will be RMS summed with the inherent ADC aperture jitter ...
Page 18
... Maximum and Minimum Conversion Rates The maximum conversion rate for the LTC2248/LTC2247/ LTC2246 is 65Msps (LTC2248), 40Msps (LTC2247), and 25Msps (LTC2246). For the ADC to operate properly, the CLK signal should have a 50% (±5%) duty cycle. Each half cycle must have at least 7.3ns (LTC2248), 11.8ns (LTC2247), and 18 ...
Page 19
... APPLICATIO S I FOR ATIO As with all high speed/high resolution converters, the digital output loading can affect the performance. The digital outputs of the LTC2248/LTC2247/LTC2246 should drive a minimal capacitive load to avoid possible interac- tion between the digital outputs and sensitive input cir- cuitry. The output should be buffered with a device such as an ALVCH16373 CMOS latch ...
Page 20
... Heat Transfer Most of the heat generated by the LTC2248/LTC2247/ LTC2246 is transferred from the die through the bottom- side exposed pad and package leads onto the printed circuit board. For good electrical and thermal perfor- mance, the exposed pad should be soldered to a large grounded pad on the PC board ...
Page 21
... U U APPLICATIO S I FOR ATIO LTC2248/LTC2247/LTC2246 W U 224876fa 21 ...
Page 22
... LTC2248/LTC2247/LTC2246 U U APPLICATIO S I FOR ATIO Silkscreen Top Inner Layer 2 GND Topside Inner Layer 3 Power 224876fa ...
Page 23
... RECOMMENDED SOLDER PAD LAYOUT Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. LTC2248/LTC2247/LTC2246 Package 32-Lead Plastic QFN (5mm × ...
Page 24
... ADC, Lowest Power LTC2238 10-Bit, 65Msps, 3V ADC, Lowest Power LTC2239 10-Bit, 80Msps, 3V ADC, Lowest Power LTC2245 14-Bit, 10Msps, 3V ADC, Lowest Power LTC2246 14-Bit, 25Msps, 3V ADC, Lowest Power LTC2247 14-Bit, 40Msps, 3V ADC, Lowest Power LTC2248 14-Bit, 65Msps, 3V ADC, Lowest Power LTC2249 ...