LTC2259CUJ-12-PBF LINER [Linear Technology], LTC2259CUJ-12-PBF Datasheet
LTC2259CUJ-12-PBF
Related parts for LTC2259CUJ-12-PBF
LTC2259CUJ-12-PBF Summary of contents
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FEATURES n 70.8dB SNR n 85dB SFDR n Low Power: 124mW/103mW/87mW n Single 1.8V Supply n CMOS, DDR CMOS or DDR LVDS Outputs n Selectable Input Ranges: 1V P-P n 800MHz Full-Power Bandwidth S/H n Optional Data Output Randomizer n ...
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LTC2261-12 LTC2260-12/LTC2259-12 ABSOLUTE MAXIMUM RATINGS Supply Voltages ( ....................... –0. – Analog Input Voltage ( PAR/SER, SENSE) (Note 3) ...........–0. CS, + – Digital ...
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... LTC2260CUJ-12#TRPBF LTC2260IUJ-12#PBF LTC2260IUJ-12#TRPBF LTC2259CUJ-12#PBF LTC2259CUJ-12#TRPBF LTC2259IUJ-12#PBF LTC2259IUJ-12#TRPBF Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi label on the shipping container. Consult LTC Marketing for information on non-standard lead based fi nish parts. ...
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LTC2261-12 LTC2260-12/LTC2259-12 ANALOG INPUT The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are 25°C. (Note 5) A SYMBOL PARAMETER + – V Analog Input Range (A – A ...
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DIGITAL INPUTS AND OUTPUTS temperature range, otherwise specifi cations are at T SYMBOL PARAMETER + – ENCODE INPUTS (ENC , ENC ) – Differential Encode Mode (ENC Not Tied to GND) V Differential Input Voltage ID V Common Mode Input ...
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LTC2261-12 LTC2260-12/LTC2259-12 POWER REQUIREMENTS range, otherwise specifi cations are SYMBOL PARAMETER CONDITIONS CMOS Output Modes: Full Data Rate and Double Data Rate V Analog Supply Voltage (Note 10 Output Supply Voltage (Note 10 ...
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TIMING CHARACTERISTICS range, otherwise specifi cations are at T SYMBOL PARAMETER Digital Data Outputs (LVDS Mode) t ENC to Data Delay D t ENC to CLKOUT Delay C t DATA to CLKOUT Skew SKEW Pipeline Latency SPI Port Timing (Note ...
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LTC2261-12 LTC2260-12/LTC2259-12 TIMING DIAGRAMS ANALOG INPUT – ENC + ENC D0_1 • • • D10_11 OF + CLKOUT – CLKOUT ANALOG INPUT – ENC + ENC + D0_1 – D0_1 • • • + D10_11 – D10_11 + OF – ...
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TIMING DIAGRAMS SCK SDI R/W SDO HIGH IMPEDANCE CS SCK SDI R/W SDO HIGH IMPEDANCE TYPICAL PERFORMANCE CHARACTERISTICS LTC2261-12: Integral Nonlinearity (INL) 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 ...
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LTC2261-12 LTC2260-12/LTC2259-12 TYPICAL PERFORMANCE CHARACTERISTICS LTC2261-12: 8k Point FFT 30MHz IN –1dBFS, 125Msps 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 FREQUENCY (MHz) 226112 G04 LTC2261-12: ...
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TYPICAL PERFORMANCE CHARACTERISTICS LTC2261-12 Sample VDD Rate, 5MHz Sine Wave Input, –1dB, 5pF on Each Data Output 45 40 3.5mA LVDS 1.75mA LVDS 1.8V CMOS 5 1.2V CMOS ...
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LTC2261-12 LTC2260-12/LTC2259-12 TYPICAL PERFORMANCE CHARACTERISTICS LTC2260-12: 8k Point 2-Tone FFT 70MHz, 75MHz, –1dBFS, IN 105Msps 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 FREQUENCY (MHz) 226112 G27 ...
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TYPICAL PERFORMANCE CHARACTERISTICS LTC2259-12: Differential Nonlinearity (DNL) 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 2048 3072 4096 1024 OUTPUT CODE 226112 G42 LTC2259-12: 8k Point FFT 70MHz IN –1dBFS, 80Msps 0 –10 –20 ...
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LTC2261-12 LTC2260-12/LTC2259-12 TYPICAL PERFORMANCE CHARACTERISTICS LTC2259-12: SFDR vs Input Level 70MHz, 2V Range, 80Msps IN 110 100 dBFS –80 –70 –60 –50 –40 –30 –20 –10 INPUT LEVEL ...
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PIN FUNCTIONS operating modes. PAR/SER should be connected directly to ground or the V of the part and not be driven logic signal. V (Pins 9, 10, 40): 1.8V Analog Power Supply. Bypass DD to ground with ...
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LTC2261-12 LTC2260-12/LTC2259-12 PIN FUNCTIONS – CLKOUT (Pin 27): Inverted version of CLKOUT + CLKOUT (Pin 28): Data Output Clock. The digital outputs normally transition at the same time as the falling and ris- + ing edges of CLKOUT . The ...
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APPLICATIONS INFORMATION CONVERTER OPERATION The LTC2261-12/LTC2260-12/LTC2259-12 are low power 12-bit 125Msps/105Msps/80Msps A/D converters that are powered by a single 1.8V supply. The analog inputs should be driven differentially. The encode input can be driven differentially or single-ended for lower power ...
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LTC2261-12 LTC2260-12/LTC2259-12 APPLICATIONS INFORMATION balun transformer (Figures has better balance, resulting in lower A/D distortion. Amplifi er Circuits Figure 7 shows the analog input being driven by a high speed differential amplifi er. The output of the ...
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APPLICATIONS INFORMATION Reference The LTC2261-12/2260-12/2259-12 has an internal 1.25V voltage reference. For a 2V input range using the internal reference, connect SENSE For a 1V input range DD using the external reference, connect SENSE to ground. For ...
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LTC2261-12 LTC2260-12/LTC2259-12 APPLICATIONS INFORMATION Encode Input The signal quality of the encode inputs strongly affects the A/D noise performance. The encode inputs should be treated as analog signals—do not route them next to digital traces on the circuit board. There ...
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APPLICATIONS INFORMATION For applications where the sample rate needs to be changed quickly, the clock duty cycle stabilizer can be disabled. If the duty cycle stabilizer is disabled, care should be taken to make the sampling clock have a 50%(±5%) ...
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LTC2261-12 LTC2260-12/LTC2259-12 APPLICATIONS INFORMATION Overfl ow Bit The overfl ow output bit (OF) outputs a logic high when the analog input is either overranged or underranged. The overfl ow bit has the same pipeline latency as the data bits. Phase ...
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APPLICATIONS INFORMATION Digital Output Randomizer Interference from the A/D digital outputs is sometimes unavoidable. Digital interference may be from capacitive or inductive coupling or coupling through the ground plane. Even a tiny coupling factor can cause unwanted tones in the ...
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LTC2261-12 LTC2260-12/LTC2259-12 APPLICATIONS INFORMATION The digital output is decoded at the receiver by inverting the odd bits (D1, D3, D5, D7, D9, D11). The alternate bit polarity mode is independent of the digital output random- izer—either, both or neither function ...
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APPLICATIONS INFORMATION Serial Programming Mode To use the serial programming mode, PAR/SER should be tied to ground. The CS, SCK, SDI and SDO pins become a serial interface that program the A/D mode control registers. Data is written to a ...
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LTC2261-12 LTC2260-12/LTC2259-12 APPLICATIONS INFORMATION REGISTER A2: TIMING REGISTER (ADDRESS 02h Bits 7-4 Unused, Don’t Care Bits. Bit 3 CLKINV Output Clock Invert Bit 0 = Normal CLKOUT Polarity (As Shown in the Timing Diagrams ...
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APPLICATIONS INFORMATION REGISTER A4: DATA FORMAT REGISTER (ADDRESS 04h OUTTEST2 Bit 7-6 Unused, Don’t Care Bits. Bits 5-3 OUTTEST2:OUTTEST0 000 = Digital Output Test Patterns Off 001 = All Digital Outputs = 0 011 = All ...
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LTC2261-12 LTC2260-12/LTC2259-12 TYPICAL APPLICATIONS T2 MABAES0060 R9 10Ω • • R39 ANALOG INPUT 33.2Ω 1% R40 33.2Ω 1% R10 10Ω R15 100Ω C12 C13 0.1μF 1μF 28 LTC2261 Schematic SENSE C23 1μF R14 C51 1k 4.7pF C17 1μF 100Ω C19 ...
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TYPICAL APPLICATIONS Silkscreen Top Inner Layer 2 GND LTC2260-12/LTC2259-12 226112 TA03 226112 TA05 LTC2261-12 Top Side 226112 TA04 Inner Layer 3 226112 TA06 226112f 29 ...
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LTC2261-12 LTC2260-12/LTC2259-12 TYPICAL APPLICATIONS Inner Layer 4 30 226112 TA07 Bottom Side 226112 TA09 Inner Layer 5 Power 226112 TA08 226112f ...
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PACKAGE DESCRIPTION 4.42 ±0.05 4.42 ±0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 6.00 ± 0.10 (4 SIDES) PIN 1 TOP MARK (SEE NOTE 6) NOTE: 1. DRAWING IS A ...
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LTC2261-12 LTC2260-12/LTC2259-12 RELATED PARTS PART NUMBER DESCRIPTION LTC1993-2 High Speed Differential Op Amp LTC1994 Low Noise, Low Distortion Fully Differential Input/ Output Amplifi er/Driver LTC2215 16-Bit, 65Msps, Low Noise ADC LTC2216 16-Bit, 80Msps, Low Noise ADC LTC2217 16-Bit, 105Msps, Low ...