LTC2413 LINER [Linear Technology], LTC2413 Datasheet - Page 11

• Manufacturer Part Number: LTC2413
• Description: 24-Bit No Latency ADC, with Simultaneous 50Hz/60Hz Rejection
• Manufacturer: LINER [Linear Technology]

FU CTIO AL BLOCK DIAGRA
TEST CIRCUITS
APPLICATIO S I FOR ATIO
CONVERTER OPERATION
Converter Operation Cycle
The LTC2413 is a low power, delta-sigma analog-to-
digital converter with an easy to use 3-wire serial interface.
Its operation is made up of three states. The converter
operating cycle begins with the conversion, followed by
the low power sleep state and ends with the data output
(see Figure 2). The 3-wire interface consists of serial data
output (SDO), serial clock (SCK) and chip select (CS).
Initially, the LTC2413 performs a conversion. Once the
conversion is complete, the device enters the sleep state.
While in this sleep state, power consumption is reduced by
an order of magnitude. The part remains in the sleep state
as long as CS is HIGH. The conversion result is held
indefinitely in a static shift register while the converter is
in the sleep state.
REF
REF
GND
V
IN
IN
CC
+
–
+
–
U
+
–
U
SDO
U
Hi-Z TO V
V
V
1.69k
– +
OL
OH
U
DAC
TO V
TO Hi-Z
OH
OH
C
LOAD
W
2413 TA03
= 20pF
Figure 1. Functional Block Diagram
U
W
ADC
Figure 2. LTC2413 State Transition Diagram
SDO
AUTOCALIBRATION
FALSE
DECIMATING FIR
AND CONTROL
Hi-Z TO V
V
V
OH
OL
V
TO Hi-Z
TO V
DATA OUTPUT
CC
CONVERT
CS = LOW
1.69k
SCK
SLEEP
C
OL
OL
AND
LOAD
TRUE
= 20pF
2413 TA04
2413 F02
OSCILLATOR
INTERFACE
INTERNAL
LTC2413
SERIAL
sn2413 2413fs
(INT/EXT)
11
F
SDO
SCK
CS
2413 FD
O