S3S12HZ256J3CAA FREESCALE [Freescale Semiconductor, Inc], S3S12HZ256J3CAA Datasheet - Page 490

• Manufacturer Part Number: S3S12HZ256J3CAA
• Description: HCS12 Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Chapter 16 Timer Module (TIM16B8CV1)
16.3.2.12 Main Timer Interrupt Flag 1 (TFLG1)
Read: Anytime
Write: Used in the clearing mechanism (set bits cause corresponding bits to be cleared). Writing a zero
will not affect current status of the bit.
490
C[7:0]F
Reset
Field
7:0
W
R
Input Capture/Output Compare Channel “x” Flag — These flags are set when an input capture or output
compare event occurs. Clear a channel flag by writing one to it.
When TFFCA bit in TSCR register is set, a read from an input capture or a write into an output compare channel
(0x0010–0x001F) will cause the corresponding channel flag CxF to be cleared.
C7F
0
7
The newly selected prescale factor will not take effect until the next
synchronized edge where all prescale counter stages equal zero.
C6F
0
6
Figure 16-20. Main Timer Interrupt Flag 1 (TFLG1)
PR2
0
0
0
0
1
1
1
1
Table 16-15. TRLG1 Field Descriptions
Table 16-14. Timer Clock Selection
MC9S12HZ256 Data Sheet, Rev. 2.04
C5F
0
5
PR1
0
0
1
1
0
0
1
1
C4F
NOTE
0
4
PR0
Description
0
1
0
1
0
1
0
1
C3F
0
3
Bus Clock / 128
Bus Clock / 16
Bus Clock / 32
Bus Clock / 64
Bus Clock / 1
Bus Clock / 2
Bus Clock / 4
Bus Clock / 8
Timer Clock
C2F
0
2
Freescale Semiconductor
C1F
0
1
C0F
0
0