LTC3409 LINER [Linear Technology], LTC3409 Datasheet - Page 13

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LTC3409

Manufacturer Part Number
LTC3409
Description
600mA Low Vin Buck Regulator in 3mm x 3mm DFN
Manufacturer
LINER [Linear Technology]
Datasheet

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APPLICATIO S I FOR ATIO
Note that at higher supply voltages, the junction tempera-
ture is lower due to reduced switch resistance (R
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
equal to (∆I
resistance of C
discharge C
The regulator loop then acts to return V
state value. During this recovery time V
tored for overshoot or ringing that would indicate a stabil-
ity problem. For a detailed explanation of switching control
loop theory, see Application Note 76.
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25 • C
Thus, a 10µF capacitor charging to 3.3V would require a
250µs rise time, limiting the charging current to about
130mA.
Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3409. These items are also illustrated graphically in
the layout diagram of Figure 3. Check the following in your
layout.
1. Does the capacitor C
(Pins 3, 4) and GND (Exposed Pad) as close as pos-
sible? This capacitor provides the AC current to the
internal power MOSFETs and their drivers.
OUT
, causing a rapid drop in V
LOAD
OUT
, which generates a feedback error signal.
OUT
• ESR), where ESR is the effective series
U
. ∆I
OUT
LOAD
immediately shifts by an amount
U
IN
connect to the power V
also begins to charge or
W
OUT
. No regulator can
OUT
OUT
can be moni-
to its steady
U
DS(ON)
LOAD
IN
).
).
2. Are the C
3. The resistor divider, R1 and R2, must be connected
4. Keep sensitive components away from the SW pins.
5. A ground plane is preferred, but if not available, keep the
6. Flood all unused areas on all layers with copper. Flood-
C
between the (+) plate of C
terminated near GND (Exposed Pad). The feedback
signals V
nents and traces, such as the SW line (Pins 6), and its
trace should be minimized.
The input capacitor C
should be routed away from the SW traces and the
inductors.
signal and power grounds segregated with small signal
components returning to the GND pin at one point. They
should not share the high current path of C
ing with copper will reduce the temperature rise of
power components. These copper areas should be
connected to V
OUT
returns current to GND and the (–) plate of C
OUT
C
FB
IN
R2
should be routed away from noisy compo-
and L1 closely connected? The (–) plate of
RUN
V
SGND GND
FB
V
IN
LTC3409
IN
V
IN
or GND.
MODE
V
SYNC
IN
SW
IN
Figure 3
and the resistors R1 and R2
OUT
L1
C1
R1
and a ground sense line
LTC3409
3409 F03
C
OUT
IN
V
OUT
or C
13
OUT
IN
3409f
.
.

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