LTC3610EWP LINER [Linear Technology], LTC3610EWP Datasheet - Page 17

• Manufacturer Part Number: LTC3610EWP
• Description: 24V, 12A Monolithic Synchronous Step-Down DC/DC Converter
• Manufacturer: LINER [Linear Technology]

APPLICATIONS INFORMATION
4. C
Other losses, including C
conduction loss during dead time and inductor core loss
generally account for less than 2% additional loss.
When making adjustments to improve effi ciency, the input
current is the best indicator of changes in effi ciency. If you
make a change and the input current decreases, then the
effi ciency has increased. If there is no change in input
current, then there is no change in effi ciency.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
equal to ΔI
resistance of C
charge C
regulator to return V
this recovery time, V
or ringing that would indicate a stability problem. The I
pin external components shown in Figure 6 will provide
adequate compensation for most applications. For a
detailed explanation of switching control loop theory see
Application Note 76.
Design Example
As a design example, take a supply with the following
specifi cations: V
2.5V ± 5%, I
the timing resistor with V
and choose the inductor for about 40% ripple current at
the maximum V
L =
the large RMS input current to the regulator. It must have
a very low ESR to minimize the AC I
capacitance to prevent the RMS current from causing
additional upstream losses in fuses or batteries.
R
IN
(
ON
550kHz
loss. The input capacitor has the diffi cult job of fi ltering
=
OUT
(
550
LOAD
generating a feedback error signal used by the
2.5V
OUT(MAX)
)
( )
kHz
0.4
OUT
IN
(ESR), where ESR is the effective series
IN
:
1
. ΔI
)(
(
= 5V to 24V (12V nominal), V
OUT
12A
OUT
OUT
10
LOAD
= 12A, f = 550kHz. First, calculate
pF
immediately shifts by an amount
OUT
to its steady-state value. During
can be monitored for overshoot
)
ON
)
also begins to charge or dis-
1
=
ESR loss, Schottky diode D1
= V
182
2.5V
28V
OUT
k
:
2
R loss and suffi cient
= 0.86μH
OUT
TH
=
Selecting a standard value of 0.82μH results in a maximum
ripple current of:
Next, set up V
to 0.5V will set the typical current limit to 16A, and tying
V
C
85°C. The output capacitors are chosen for a low ESR
of 0.013Ω to minimize output voltage changes due to
inductor ripple current and load steps. The ripple voltage
will be only:
However, a 0A to 10A load step will cause an output
change of up to:
An optional 22μF ceramic output capacitor is included
to minimize the effect of ESL in the output ripple. The
complete circuit is shown in Figure 6.
PC Board Layout Checklist
When laying out a PC board follow one of the two sug-
gested approaches. The simple PC board layout requires
a dedicated ground plane layer. Also, for higher currents, a
multilayer board is recommended to help with heat sinking
of power components.
• The ground plane layer should not have any traces and
• Place C
• Keep small-signal components close to the LTC3610.
• Ground connections (including LTC3610 SGND and
RNG
IN
ΔV
ΔV
it should be as close as possible to the layer with the
LTC3610.
the LTC3610. It may help to have some components
on the bottom side of the board.
PGND) should be made through immediate vias to
the ground plane. Use several larger vias for power
components.
is chosen for an RMS current rating of about 5A at
I
L
OUT(STEP)
OUT(RIPPLE)
to GND will result in a typical current around 19A.
=
(
550kHz
IN
and C
RNG
= ΔI
2.5V
= ΔI
= (4.4A) (0.013Ω) = 57mV
voltage and check the I
)
LOAD
OUT
(
0.82μH
L(MAX)
all in one compact area, close to
(ESR) = (10A) (0.013Ω) = 130mV
)
(ESR)
1–
2.5V
12V
LTC3610
LIMIT
= 4.4A
. Tying V
17
3610fd
RNG