LTC3719 LINER [Linear Technology], LTC3719 Datasheet
LTC3719
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LTC3719 Summary of contents
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... SENSE1 TG2 BOOST2 0.47 F SW2 BG2 INTV + CC + SENSE2 10 F – SENSE2 Figure 1. High Current Dual Phase Step-Down Converter LTC3719 AMD Opteron™ CPUs U 3719 is a 2-phase, VID programmable, synchro- ® operation for 28V 10 F 35V 6 0.002 0.002 V _ ...
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... Measured at V EAIN V Ramping Down 1.2V, Sink/Source 5 A (Note 1.2V, (g • Ext Load) (Note ORDER PART TOP VIEW NUMBER 1 PGOOD 36 2 TG1 35 LTC3719EG 3 SW1 34 4 BOOST1 BG1 31 7 EXTV INTV PGND 28 10 ...
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... 20mA EXTVCC I = 20mA EXTVCC I = 20mA, EXTV Ramping Positive 20mA, EXTV Ramping Negative CC CC (Note 8) V < VID0–VID4 < 7V BIAS I = 2mA NO_CPU LTC3719 = 5V unless otherwise noted. MIN TYP MAX UNITS 1 – 0.5 –1.2 1.0 1.5 1.9 4.1 4.5 0 1.6 5 – 85 – 99 ...
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... P according to the following formula: D LTC3719EG • Note 4: The LTC3719 is tested in a feedback loop that servos V specified voltage and measures the resultant V 4 The denotes the specifications which apply over the full operating = 15V 5V BIAS ...
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... CURRENT (mA) 3719 G05 Maximum Current Sense Threshold vs Duty Factor 100 DUTY FACTOR (%) 3719 G08 LTC3719 Efficiency vs Input Voltage (Figure 12) 100 I = 20A OUT V = 1.55V OUT INPUT VOLTAGE (V) 3719 G03 INTV and EXTV ...
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... LTC3719 W U TYPICAL PERFOR A CE CHARACTERISTICS Maximum Current Sense Threshold vs V (Soft-Start) RUN/ 1.55V SENSE(CM (V) RUN/SS 3719 G10 Load Regulation 0.0 FCB = 15V IN FIGURE 1 –0.1 –0.2 –0.3 –0 LOAD CURRENT (A) 3719 G13 ...
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... TEMPERATURE ( C) 3719 G21 V Thresholds vs Temperature 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0 100 125 –50 3719 G23 LTC3719 Constant Frequency Mode (Figure 12 12V 1.55V OUT LOAD V OUT(AC) 50mV/DIV I L1 5A/DIV I L2 5A/DIV FCB = INTV CC 10 s/DIV 3719 G25 Oscillator Frequency vs Temperature 350 ...
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... LTC3719 CTIO S RUN/SS (Pin 1): Combination of Soft-Start, Run Control Input and Short-Circuit Detection Timer. A capacitor to ground at this pin sets the ramp time to full current output. Forcing this pin below 0.8V causes the IC to shut down all internal circuitry. All functions are disabled in shutdown. ...
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... IC’s signal ground pin PGOOD (Pin 36): Open-Drain Logic Output. PGOOD is pulled to ground when the voltage on the EAIN pin is not Switch. The driver and within 10% of its set point. LTC3719 (Pin 30): External Power Input to an Internal Connection in the Applica EXTVCC ...
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... LTC3719 CTIO AL DIAGRA PLLIN PHASE DET f IN 50k PLLFLTR R LP CLK1 C LP OSCILLATOR CLK2 TO SECOND CHANNEL PGOOD – 0.66V + EAIN – + 0.54V – 40k 40k – 40k 40k DIFFOUT 3V – 4.5V 0. FCB + FCB – V 0.60V REF 4.8V 5V – EXTV ...
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... U OPERATIO (Refer to Functional Diagram) Main Control Loop The LTC3719 uses a constant frequency, current mode step-down architecture with the two output stages oper- ating 180 degrees out of phase. During normal operation, each top MOSFET is turned on when the clock for that channel sets the RS latch, and turned off when the main current comparator resets the RS latch ...
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... LTC3719 U OPERATIO (Refer to Functional Diagram) Frequency Synchronization The phase-locked loop allows the internal oscillator to be synchronized to an external source via the PLLIN pin. The output of the phase detector at the PLLFLTR pin is also the DC frequency control input of the oscillator that operates over a 140kHz to 310kHz range corresponding voltage input from ...
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... U U APPLICATIO S I FOR ATIO The basic LTC3719 application circuit is shown in Figure 1 on the first page. External component selection begins with the selection of the inductors based on ripple current requirements and continues with the current sensing resistors using the calculated peak inductor current and/or maximum current limit ...
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... However, designs for surface mount are available which do not increase the height significantly. Power MOSFET, D1 and D2 Selection Two external power MOSFETs must be selected for each output stage with the LTC3719: one N-channel MOSFET 0.7 0.8 0.9 for the top (main) switch, and one N-channel MOSFET for ...
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... U U APPLICATIO S I FOR ATIO LTC3719 is operating in continuous mode the duty factors for the top and bottom MOSFETs of each output stage are given by: V OUT Main Switch Duty Cycle V IN Synchronous Switch Duty Cycle The MOSFET power dissipations at maximum output current are given by: ...
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... LTC3719 U U APPLICATIO S I FOR ATIO 0.6 0.5 0.4 1-PHASE 2-PHASE 0.3 0.2 0.1 0 0.1 0.2 0.3 0.4 0.5 DUTY FACTOR (V OUT Figure 4. Normalized RMS Input Ripple Current vs Duty Factor for 1 and 2 Output Stages It is important to note that the efficiency loss is propor- tional to the input RMS current squared and therefore a 2-phase implementation results in 75% less power loss when compared to a single phase design ...
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... MOSFET gate drivers. High input voltage applications in which large MOSFETs are being driven at high frequencies may cause the maxi- mum junction temperature rating for the LTC3719 to be exceeded. The supply current is dominated by the gate charge supply current, in addition to the current drawn from the differential amplifier output ...
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... The output voltage is digitally programmed as defined in Table 1 using the VID0 to VID4 logic input pins. The VID logic inputs program a precision, 0.25% internal feedback resistive divider. The LTC3719 has an output voltage range of 0.8V to 1.55V in 25mV steps. Between the ATTENOUT pin and ground is a variable resistor, R1, whose value is controlled by the five VID input pins (VID0 to VID4) ...
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... IRAMP pulling the RUN/SS pin below 0.8V the LTC3719 is put into low current shutdown (I < 40 A). The RUN/SS pins Q can be driven directly from logic as shown in Figure 5. Diode D1 in Figure 5 reduces the start delay but allows C to ramp up slowly providing the soft-start function. ...
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... At this stable operating point the phase comparator output is open and the filter capacitor C LTC3719 PLLIN pin must be driven from a low impedance source such as a logic gate located close to the pin equal to the capture range ...
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... Minimum On-Time Considerations Minimum on-time the smallest time duration ON(MIN) that the LTC3719 is capable of turning on the top MOSFET determined by internal timing delays and the gate charge required to turn on the top MOSFET. Low duty cycle applications may approach this minimum on-time limit ...
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... L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, four main sources usually account for most of the 2 losses in LTC3719 circuits MOSFET transition losses, 3) INTV and 4) LTC3719 V current (including loading on the IN differential amplifier output) ...
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... A 50W supply will typically require a minimum of 200 F to 300 F of output capaci- tance having a maximum of 10m to 20m of ESR. The LTC3719 2-phase architecture typically halves the input and output capacitance requirements over competing solutions. Other losses including Schottky conduction losses during dead-time and inductor core losses gener- ally account for less than 2% total additional loss ...
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... LTC3719 U U APPLICATIO S I FOR ATIO Design Example As a design example, assume (nominal (max 1.2V 20A and f = 300kHz. OUT MAX A The inductance value is chosen first based on a 30% ripple current assumption. The highest value of ripple current occurs at the maximum input voltage. Tie the FREQSET pin to the INTV pin for 300kHz operation ...
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... Are the SENSE minimum PC trace spacing? The filter capacitors between + SENSE possible to the LTC3719. Ensure accurate current sensing with Kelvin connections at the current sense resistor. See Figure 8. 4) Does the (+) plate of C topside MOSFETs as closely as possible? This capacitor provides the AC current to the MOSFETs. Keep the input ...
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... LTC3719 U U APPLICATIO S I FOR ATIO The diagram in Figure 9 illustrates all branch currents in a 2-phase switching regulator. It becomes very clear after studying the current waveforms why it is critical to keep the high-switching-current paths to a small physical size. High electric and magnetic fields will radiate from these “ ...
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... Ceramic input capacitors with their unbeatably low ESR characteristics can be used. SINGLE PHASE SW1 V SW2 CIN I COUT Figure 10. Single and 2-Phase Current Waveforms LTC3719 DUAL PHASE RIPPLE 3719 F11 sn3719 3719fs 27 ...
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... When V as illustrated in Figures 3 and 4, very low input and output ripple currents result. Figure 11 shows a typical application using LTC3719 to power the AMD CPU core. The input can vary from discharge current 24V, the output voltage can be programmed from 0. ...
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... U TYPICAL APPLICATIO LTC3719 sn3719 3719fs 29 ...
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... LTC3719 U TYPICAL APPLICATIO 30 sn3719 3719fs ...
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... Plastic SSOP (5.3mm) (Reference LTC DWG # 05-08-1640) 1.25 0. 5.3 – 5.7 0.65 BSC – 8 0.65 (.0256) BSC 0.22 – 0.38 (.009 – .015) LTC3719 12.50 – 13.10* (.492 – .516 7.40 – 8.20 (.291 – .323 ...
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... LTC3719 RELATED PARTS PART NUMBER DESCRIPTION LTC1436A-PLL High Efficiency Low Noise Synchronous Step-Down Switching Regulator LTC1438/LTC1439 Dual High Efficiency Low Noise Synchronous Step-Down Switching Regulators POR, Auxiliary Regulator LTC1438-ADJ Dual Synchronous Controller with Auxiliary Regulator LTC1538-AUX Dual High Efficiency Low Noise Synchronous Step-Down Switching Regulator ...