LM1246AAA National Semiconductor, LM1246AAA Datasheet - Page 36
![no-image](/images/manufacturer_photos/0/4/469/national_semiconductor_sml.jpg)
LM1246AAA
Manufacturer Part Number
LM1246AAA
Description
150 MHz I2C Compatible RGB Preamplifier with Internal 512 Character OSD ROM/ 512 Character RAM and 4 DACs
Manufacturer
National Semiconductor
Datasheet
1.LM1246AAA.pdf
(51 pages)
www.national.com
Control Register Definitions
ROM Signature Data:
Display Window 1 Horizontal Start Address:
Display Window 1 Vertical Start Address:
Display Window 1 Start Address:
Display Window 1 Column Width:
X
Bit 0
Bits 7–1
Bits 15–0
Bits 7–0
Bits 7–0
Bits 8–0
Bits 15–9
X
ROMSIGDATAB1 (0x840F)
X
COLWIDTH1B3 (0x8417)
W1STRTADRH (0x8413)
Reserved
This controls the calculation of the ROM signature. Setting this bit causes the ROM to be read
sequentially and a 16-bit checksum calculated over the 256 characters. The sum, modulo 65535, is
stored in the ROM Signature Data Register, and this bit is then automatically cleared.
Reserved. These should be set to zero.
This is the checksum of the 256 ROM characters truncated to 16 bits (modulo 65535). All devices
with the same masked ROM will have the same checksum.
There are two possible OSD windows which can be displayed simultaneously or individually. This
register determines the horizontal start position of Window 1 in OSD pixels (not video signal
pixels). The actual position, to the right of the horizontal flyback pulse, is determined by multiplying
this register value by 4 and adding 30. Due to pipeline delays, the first usable start location is
approximately 42 OSD pixels following the horizontal flyback time. For this reason, we recommend
this register be programmed with a number larger than 2, otherwise improper operation may result.
This register determines the Vertical start position of the Window 1 in constant-height character
lines (not video scan lines). The actual position is determined by multiplying this register value by
2. (Note: each character line is treated as a single auto-height character pixel line, so multiple scan
lines may actually be displayed in order to maintain accurate position relative to the OSD character
cell size. See the Constant Character Height Mechanism section.) This register should be set so
the entire OSD window is within the active video.
This register determines the starting address of Display Window 1 in the Display Page RAM. The
power-on default of 0x00 starts Window 1 at the beginning of the Page RAM (0x8000). This first
address location always contains the SL code for the first line of Display Window 1. This register is
new for the LM1246 and allows Window 1 to start anywhere in the Page RAM rather than just at
0x8000. Note that the address this points to in Page RAM must always contain the SL code for the
first line of the window.
These bits are reserved and should be set to zero.
X
X
X
Window 1 Column Width - High Bytes
Window 1 Horizontal Start Location
Window 1 Vertical Start Address
(Continued)
X
HSTRT1 (0x8410)
16-Bit Checksum
VSTRT1 (0x8411)
COL[31:16]
CRC[15:0]
1H[7:0]
1V[7:0]
36
Window 1 Start Address
ROMSIGDATAB0 (0x840E)
COLWIDTH1B2 (0x8416)
W1STRTADRL (0x8412)
1AD[8:0]