CS51311GD14 Cherry Semiconductor Corporation, CS51311GD14 Datasheet - Page 2

• Manufacturer Part Number: CS51311GD14
• Description: Synchronous CPU Buck Controller for 12V and 5V Applications
• Manufacturer: Cherry Semiconductor Corporation

V
COMP
V
C
GATE(H), GATE(L) High-Side, Low-Side FET Drivers
PWRGD
Gnd
Pin Symbol
CC
FB
OFF
Operating Junction Temperature, T
Lead Temperature Soldering
Storage Temperature Range, T
ESD Susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV
, V
Reflow (SMD styles only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 sec. max above 183°C, 230°C peak
OUT
PACKAGE PIN #
, V
1,2,3,4,5
ID0-4
10
11
12
13
14
6
7
8
9
IC Power Input
Compensation Pin
Voltage Feedback Input, Output
Voltage Sense Pin, Voltage
ID DAC Inputs
Off-Time Pin
Power-Good Output
Ground
S
PIN SYMBOL
V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65° to 150°C
GATE(H)
GATE(L)
PWRGD
IDO
COMP
J
V
C
Gnd
V
Pin Name
V
OUT
OFF
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
– V
CC
FB
ID4
Absolute Maximum Ratings
Package Pin Description
Voltage ID DAC inputs. These pins are internally pulled up to
5.65V if left open. V
high (logic one), the Error Amp reference range is 2.125V to
3.525V with 100mV increments. When V
the Error amp reference voltage is 1.325V to 2.075V with 50mV
increments.
Error amp inverting input, PWM comparator non-inverting
input, current limit comparator non-inverting input, PWRGD
comparator input.
Current limit comparator inverting input.
Input power supply pin for the internal circuitry.
Decouple with filter capacitor to Gnd.
High side switch FET driver pin .
Ground pin.
Low side synchronous FET driver pin.
Power-Good Output. Open collector output drives low when
V
Off-Time Capacitor Pin. A capacitor from this pin to Gnd sets
the off time for the regulator
Error amp output. PWM comparator inverting input.
A capacitor on this pin provides error amp compensation.
FB
2
is out of regulation.
V
16V
16V
6V
6V
6V
6V
0V
MAX
ID4
selects the DAC range. When V
-0.3V DC
FUNCTION
-0.3V
-0.3V
-0.3V
-0.3V
-0.3V
V
0V
MIN
200mA DC
200mA DC
1.5A Peak
1.5APeak
I
SOURCE
ID4
N/A
1mA
1mA
1mA
1mA
is low (logic zero),
200mA DC
200mA DC
1.5 APeak
1.5A Peak
ID4
50mA
30mA
I
N/A
5mA
1mA
SINK
is