EPM3064xxx Altera, EPM3064xxx Datasheet - Page 25

• Manufacturer Part Number: EPM3064xxx
• Description: MAX 3000A Programmable Logic Device Family
• Manufacturer: Altera

Altera Corporation
Timing Model
Figure 10. MAX 3000A Timing Model
Delay
Input
t
I N
Delay
t
PIA
PIA
MAX 3000A device timing can be analyzed with the Altera software, with
a variety of popular industry–standard EDA simulators and timing
analyzers, or with the timing model shown in
devices have predictable internal delays that enable the designer to
determine the worst–case timing of any design. The software provides
timing simulation, point–to–point delay prediction, and detailed timing
analysis for device–wide performance evaluation.
The timing characteristics of any signal path can be derived from the
timing model and parameters of a particular device. External timing
parameters, which represent pin–to–pin timing delays, can be calculated
as the sum of internal parameters.
between internal and external delay parameters.
Expander Delay
Internal Output
Global Control
Control Delay
Enable Delay
Logic Array
Register
Shared
Delay
t
Delay
t
t
t
t
t
t
GLOB
SEXP
LAC
I C
EN
IOE
LAD
MAX 3000A Programmable Logic Device Family Data Sheet
Expander Delay
Parallel
t
PEXP
Figure 11
Register
t
t
t
t
t
t
Delay
SU
H
PRE
CLR
RD
COMB
shows the timing relationship
Figure
Output
Delay
t
t
t
t
t
t
t
OD1
OD2
OD3
XZ
Z
Z X2
Z X3
10. MAX 3000A
X1
Delay
I/O
t
I O
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