SAA7201H Philips Semiconductors, SAA7201H Datasheet
SAA7201H
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SAA7201H Summary of contents
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DATA SHEET SAA7201 Integrated MPEG2 AVG decoder Objective specification File under Integrated Circuits, IC02 INTEGRATED CIRCUITS 1997 Jan 29 ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder FEATURES General Uses single external Synchronous DRAM (SDRAM) organized interfacing at 81 MHz; compatible with the SDRAM ‘lite’ or ‘PC’ Fast external CPU interface; 16-bit data + 8-bit address Dedicated input for audio and video data in PES or ES format ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder Flexible horizontal continuous scaling from 0 allows easy aspect ratio conversion including support for 2. aspect ratio movies Vertical scaling with fixed factors 0. support picture scaling and up-sampling Scaling of incoming pictures to 25% of their original size ...
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... CLK ORDERING INFORMATION TYPE NUMBER NAME SAA7201H QFP160 plastic quad flat package; 160 leads (lead length 1.95 mm); body 28 1997 Jan 29 Due to an optimized architecture for audio and video decoding, maximum capacity in the external memory and processing power from the external CPU is available for the support for graphics ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder BLOCK DIAGRAM V DDCO1 to handbook, full pagewidth V DDCO4 SDRAM_RAS 4 159 A_STROBE 148 V_STROBE AUDIO/VIDEO 8 INTERFACE AV_DATA 147 ERROR SYSTEM TIME 2 CPU_TYPE 1 MUX R/W 12 DTACK 8 ADDRESS DATA( IRQ DMA_REQ 3 DMA_ACK ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder PINNING SYMBOL PIN MUX 1 multiplexed/non-multiplexed (active LOW) bus input CPU_TYPE 2 Intel/Motorola (active LOW) selection input DMA_ACK 3 DMA acknowledge input DMA_REQ 4 DMA request input and output DMA_DONE 5 DMA end input DMA_RDY 6 DMA ready output V 7 ground for pad ring ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder SYMBOL PIN ADDRESS1 41 CPU address interface ADDRESS2 42 CPU address interface ADDRESS3 43 CPU address interface ADDRESS4 44 CPU address interface V 45 supply for pad ring DD4 ADDRESS5 46 CPU address interface ADDRESS6 47 CPU address interface ADDRESS7 48 CPU address interface ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder SYMBOL PIN READ 81 read command output ground for pad ring SS9 CP81MEXT 83 81 MHz clock return path input CP81M 84 81 MHz memory clock output V 85 supply for pad ring DD9 SDRAM_ADDR8 86 memory address SDRAM_ADDR9 ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder SYMBOL PIN V 121 supply for analogue blocks DDA V 122 ground for analogue blocks SSA V 123 ground for pad ring SS13 CLK 124 27 MHz clock input V 125 ground for pad ring SS14 TCLK 126 boundary scan test clock input ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder handbook, full pagewidth MUX 1 CPU_TYPE 2 DMA_ACK 3 DMA_REQ 4 DMA_DONE 5 DMA_RDY 6 V SS1 R/W 11 DTACK 12 V DD1 13 IRQ0 14 IRQ1 15 IRQ2 16 IRQ3 17 V SS2 18 V SSCO1 19 V DDCO1 20 DATA0 21 DATA1 22 DATA2 23 DATA3 24 V DD2 25 DATA4 ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder FUNCTIONAL DESCRIPTION General The SAA7201 is an MPEG2 decoder which combines audio decoding, video decoding and enhanced region based graphics. The decoder operates with a single 16 Mbit external synchronous dynamic random access memory (SDRAM) and runs from a single external 27 MHz clock ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder handbook, full pagewidth AV_DATA0 V_STROBE A_STROBE Alternatively data can be received in a 1-bit serial format at rates Mbit/s. In this mode, data is input at the LSB input of the AV_DATA bus. Audio and video data must be input in multiples of 8 bits. The first bit after switching from ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder System time base unit The system time base unit serves as a timing master for all internal processes. It consists of two 24-bit wide System Time Clock (STC) counters, running at 90 kHz. The STCs will be used as internal synchronization reference for audio and video ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder Audio decoding will be performed at a clock locked to the video decoding clock and only the output interface is running on the audio oversampling clock. The audio decoder unit performs the decoding of the selected MPEG audio stream in a range from 448 kbit fixed or variable bit rate format ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder Video decoder The video decoding unit provides all actions required for compliant decoding of MPEG2 main level, main profile coded video bit streams. The decoding process consists of fixed and variable length decoding, run length decoding, inverse quantization, inverse discrete cosine transformation, motion compensation and interpolation ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder Graphics unit The SAA7201 incorporates the display support for pixel based graphics. Possible applications are the user interface, logos and subtitling. Graphical data should be grouped logically in regions and will be displayed in boxes at the screen. The definition of each region in the decoder consists of ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder Basically there is no restriction on the number of different regions but because regions may not vertically overlap the practical limit will be the number of lines within a field. However, one should realize that each region requires its own 128-bit region descriptor. ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder C URSOR PROCESSING Additionally to the above defined graphics boxes one cursor can be activated on the screen. Since the cursor data is fully stored locally, no overlapping restriction apply to this box so the cursor can moved over the entire screen. The cursor can be as large as 1 kpixel with a 2 bits/pixel colour depth ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder The chroma up-conversion unit converts the MPEG format into the at the output required format. This vertical up-conversion is performed by a simple 8-phase interpolation between two adjacent lines. The mixer units combine MPEG video with graphics and cursor information in two steps ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder JTAG The SAA7201 supports the standard Boundary Scan test instructions: bypass, extest, sample, intest, runbist, idcode. Memory requirements As indicated before the MPEG source decoder operates with 16 Mbit of external memory. Several processes require access to the external memory, mostly being the video decoding process ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC134). SYMBOL PARAMETER V supply voltage (on all supply pins maximum voltage on all pins max P total power dissipation tot T storage temperature stg T operating ambient temperature amb THERMAL CHARACTERISTICS ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder CHARACTERISTICS SYMBOL PARAMETER Supply V supply voltage DD I supply current DD Inputs V HIGH level input voltage IH V LOW level input voltage IL I leakage current LI C input capacitance i Outputs V HIGH level output voltage OH V LOW level output voltage ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder handbook, full pagewidth ADDRESS ( su(A-CS) CS R/W DS DTACK t su(D-W) DATA ( handbook, full pagewidth ADDRESS ( su(A-CS) CS R/W DS DTACK DATA ( 1997 Jan 29 ADDRESS t h(A-CS) t W(RW) t d(ACK-W) t h(D) DATA Fig.13 Motorola write timing (non-multiplexed). ADDRESS t h(A-CS) t W(RW) t d(ACK- su(D-R) Fig ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder handbook, full pagewidth ADDRESS ADDRESS ( su(A-CS) CS R/W RDY t su(D-W) DATA ( handbook, full pagewidth ADDRESS ADDRESS ( su(A-CS) CS R/W RDY DATA ( 1997 Jan 29 t h(A-CS) t W(RW) t d(ACK-W) t rel(ACK) t h(D) DATA Fig.15 Intel write timing (non-multiplexed). t h(A-CS) t W(RW) t d(ACK-R) t su(D-R) t rel(ACK Fig ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder handbook, full pagewidth CS t su(A-CS) DMA_REQ DMA_ACK DMA_RDY t su(D-W) DATA DATA ( handbook, full pagewidth CS t su(A-CS) DMA_REQ DMA_ACK DMA_RDY DATA ( 1997 Jan 29 t h(A-CS) t W(RW) t d(ACK-W) t h(D) Fig.17 DMA read access. t h(A-CS) t W(RW) t d(ACK- su(D-R) DATA Fig.18 DMA write access. ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder handbook, full pagewidth DMA_REQ DMA_ACK DMA_DONE handbook, full pagewidth DATA ( RDY t W(ALE) ALE t su(A-CS) ADDRESS ( h(CS-ALE) CS SYSRD 1997 Jan 29 Fig.19 DMA_DONE timing. t su(ALE-SDR) t h(A-CS) ADDRESS Fig.20 SAA7208 mode; read timing. 26 Objective specification SAA7201 ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder handbook, full pagewidth DATA ( RDY t W(ALE) ALE ADDRESS ( h(CS-ALE) CS SYSRD 1997 Jan 29 DATA t W(D-SDR) t su(A-CS) ADDRESS Fig.21 SAA7208 mode; write timing. 27 Objective specification SAA7201 t h(D-SDR) t W(SDR) t h(A-CS) t h(CS) MGD918 ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder handbook, full pagewidth DATA ( RDY t W(ALE) ALE ADDRESS ( h(CS-ALE) CS SYSRD 1997 Jan 29 DATA t su(D-SDR) t h(D-SDR) t su(D-SDR) t W(SDR) t rel(SDR) t su(A-SDR) t h(A-SDR) t su(A-SDR) ADDRESS Fig.22 SAA7208 mode; burst write timing. 28 Objective specification SAA7201 ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder handbook, full pagewidth ADDRESS AD(read) AD(write) ADDRESS t su(A-S) CS RDY ALE RD WR REFERENCES 1. MPEG ISO/IEC 11172-1 International standard; MPEG-1 systems. 2. MPEG ISO/IEC 13818-1 International standard; MPEG-2 systems. 3. MPEG ISO/IEC 11172-2 International standard; MPEG-1 Video. 4. MPEG ISO/IEC 13818-2 International standard; MPEG-2 Video. ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder APPLICATION INFORMATION handbook, full pagewidth 4 Mbit EPROM (DEMUX/MIPS) 27.0 MHz 2 I C-bus 1997 Jan 29 4 Mbit 16 Mbit DRAM SDRAM address data INT 8 SAA7208 SAA7201 strobe H,V valid 27 MHz TTX/TTXRQ high speed data SAA7183 (EURO-DENC) Fig ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder APPENDIX Syntax of pixel-data-sub-block data type pixel-code-string of N-coded words 2 bit/pixel 01 10 0001 0000 bit/pixel 0001 0001 0001 1111 0000 1100 0000 1101 0000 0LLL (L>0) ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder PACKAGE OUTLINE QFP160: plastic quad flat package; 160 leads (lead length 1.95 mm); body 3.4 mm; high stand-off height y 120 121 pin 1 index 160 DIMENSIONS (mm are the original dimensions) A UNIT max ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains fi ...
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... Philips Semiconductors Integrated MPEG2 AVG decoder 1997 Jan 29 NOTES 35 Objective specification SAA7201 ...
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... Tel. +46 8 632 2000, Fax. +46 8 632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH, Tel. +41 1 488 2686, Fax. +41 1 481 7730 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2870, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel ...