SAA7201H Philips Semiconductors, SAA7201H Datasheet - Page 14

• Manufacturer Part Number: SAA7201H
• Description: Integrated MPEG2 AVG decoder
• Manufacturer: Philips Semiconductors

Philips Semiconductors
Audio decoding will be performed at a clock locked to the
video decoding clock and only the output interface is
running on the audio oversampling clock.
The audio decoder unit performs the decoding of the
selected MPEG audio stream in a range from 8 up to
448 kbit/s in a fixed or variable bit rate format. Decoding is
restricted to 2 channel, layer I, II MPEG audio at sampling
frequency of 48.0, 44.1, 32.0, 24.0, 22.05 or 16.0 kHz.
The audio decoder support the stop, mute, and skip
function to support insertion
Apart from basic MPEG processing the audio decoder
core contain also:
1997 Jan 29
handbook, full pagewidth
Support for: stop, mute and skip function.
Fully parameterized dynamic range compression unit to
decrease the dynamic range of the output signal on
audio frame basis. Depending on the power level a
programmable amplification and offset may be applied.
Fully programmable base band audio processing unit to
control the gain in both output channels independently
and/or to mix both channels.
MPEG de-emphasis filtering on the output data, thus
avoiding the need of external analog de-emphasis filter
circuitry.
Storage buffer for the last 54 bytes of each audio frame.
The CPU can retrieve eventual ancillary data from this
buffer.
Integrated MPEG2 AVG decoder
SCLK
WS
SD
MSB aligned
0
b17
left sample n
Fig.6 I
b0
2
S-bus format with 18-bit sample precision.
31
32
b17
right sample n
14
The output of the audio decoder unit can be mixed with
square waveform audio signals which are generated by a
beep generator. Programmable parameters for the beep
generator are amplitude, frequency and duration.
The audio output interface module produces stereo base
band output samples on two different outputs at the same
time:
Any of the two outputs may be enabled or set to high
impedance mode. The I
precision is shown in Fig.6.
The difference between I
is that I
format is LSB aligned.
The 1-bit serial interface SPDIF contains 64-bit per audio
sample period. Complete frames must be transmitted at
the audio sample rate. Not only left/right information but
also validity flags, channel status, user data and parity
information is contained in an SPDIF frame (see Chapter
“References”).
b0
Serial digital audio in I
16, 18, 20 or 22-bit
SPDIF (Sony/Philips Digital Interface).
2
S-bus is MSB aligned whereas the Japanese
63
b17
left sample n + 1
2
2
S-bus format with 18-bit sample
2
S-bus or in Japanese format in
S-bus and the Japanese format
b0
Objective specification
SAA7201
MGD326