SAA7371GP Philips Semiconductors, SAA7371GP Datasheet - Page 51

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SAA7371GP

Manufacturer Part Number
SAA7371GP
Description
Digital servo processor and Compact Disc decoder CD7
Manufacturer
Philips Semiconductors
Datasheet
Philips Semiconductors
Notes
1. The 4-wire bus mode microprocessor interface timing for writing to registers 0 to F, and reading Q-channel subcode
2. Negative set-up time means that the data may change after clock transition.
1998 Jul 06
handbook, full pagewidth
W
t
t
t
t
t
t
SYMBOL
sD
hD
sCL
hCL
dPLP
dWZ
Digital servo processor and
Compact Disc decoder (CD7)
RITE MODE
and decoder status, is a function of the overspeed factor ‘n’. In the lock-to-disc mode the maximum data rate is lower.
set-up time SDA to SCL
hold time SCL to SDA
set-up time SCL to SILD
hold time SILD to SCL
delay between two SILD
pulses
delay time SDA
high-impedance to SILD
SBSY
SFSY
(4-wire mode)
SFSY
(3-wire mode)
(C
L
= 20 pF)
PARAMETER
SFSY
RCK
SUB
0.8 V
t W(SFSY)
Fig.31 Subcode interface timing diagram.
t W(SBSY)
t d(SFSY SUB)
CONDITIONS
t d(SFSY RCK)
t cy(frame)
t h(RCK SUB)
0
950
480
120
70
0
t r
51
MIN.
NORMAL MODE
t SFSYL
t SFSYH
V DD – 0.8 V
t f
MAX.
t d(RCK SUB)
T cy(block)
0
950
480
120
70
0
LOCK-TO-DISC MODE
MIN.
0.8 V
V DD – 0.8 V
0.8 V
Product specification
MBG414
MAX.
SAA7371
ns
ns
ns
ns
ns
UNIT
s

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