PALCE16V8 Lattice Semiconductor, PALCE16V8 Datasheet
PALCE16V8
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PALCE16V8 Summary of contents
Page 1
... The PALCE16V8 will directly replace the PAL16R8, with the exception of the PAL16C1. The PALCE16V8Z provides zero standby power and high speed. At 30-µA maximum standby current, the PALCE16V8Z allows battery-powered operation for an extended period. The PALCE16V8 utilizes the familiar sum-of-products (AND/OR) architecture that allows users to implement complex logic functions easily and effi ...
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... This file, once downloaded to a programmer, configures the device according to the user’s desired function. The user is given two design options with the PALCE16V8. First, it can be programmed as a standard PAL device from the PAL16R8 series. The PAL programmer manufacturer will supply device codes for the standard PAL device architectures to be used with the PALCE16V8 ...
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... Alternatively, the device can be programmed as a PALCE16V8. Here the user must use the PALCE16V8 device code. This option allows full utilization of the macrocell SG1 *In macrocells MC and MC , SG1 is replaced by SG0 on the feedback multiplexer CONFIGURATION OPTIONS Each macrocell can be configured as one of the following: registered output, combinatorial output, combinatorial I/O, or dedicated input. In the registered output confi ...
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... Q on the register. The output buffer is enabled by OE. Combinatorial Configurations The PALCE16V8 has three combinatorial output configurations: dedicated output in a non- registered device, I non-registered device and I registered device. Dedicated Output in a Non-Registered Device The control bit settings are SG0 = 1, SG1 = 0 and SL0 to the OR gate ...
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... It can also save “DeMorganizing” efforts. Selection is through a programmable bit SL1 of the AND/OR logic. The output is active high if SL1 which controls an exclusive-OR gate at the output and active low if SL1 x PALCE16V8 and PALCE16V8Z Families ...
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... Feedback is not available on pins 15 and 16 in the combinatorial output mode. 2. This configuration is not available on pins 15 and 16 Registered active high d. Combinatorial I/O active high Note 1 f. Combinatorial output active high Figure 2. Macrocell Configurations PALCE16V8 and PALCE16V8Z Families CLK V CC Note 1 Adjacent I/O pin Note 2 g ...
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... Security Bit A security bit is provided on the PALCE16V8 as a deterrent to unauthorized copying of the array configuration patterns. Once programmed, this bit defeats readback and verification of the programmed pattern by a device programmer, securing proprietary designs from competitors. ...
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... This saving is illustrated in the I Product-Term Disable On a programmed PALCE16V8Z, any product terms that are not used are disabled. Power is cut off from the product terms so that they do not draw current. As shown in the I graph, product-term disabling results in considerable power savings. This saving is greater at the higher frequencies ...
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... SG1 SL1 SG1 SL1 SG1 SL1 SG1 SL1 PALCE16V8 and PALCE16V8Z Families SL0 I SG0 ...
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... SL1 SG1 SL1 SG1 SL1 SG1 SL1 PALCE16V8 and PALCE16V8Z Families CLK SL0 I SG1 SL0 ...
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... 0 Max (Note 3) OUT CC Outputs Open ( mA), V OUT V = Max CC Outputs Open ( mA), OUT V = Max MHz CC and I (or I and I ). OZL IH OZH PALCE16V8H-5/7 (Com’ Min Max , V = Min 2 Min 0.5 CC 2.0 0.8 10 –100 10 –100 –30 –150 = 125 115 ...
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... S CF 1/( and t are defined under best case conditions. Future process improvements PZX PXZ EA ER can be found using the following equation: CF PALCE16V8H-5/7 (Com’l) Typ Unit 5 ° MHz Min Max Min Max ...
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... Max OUT (Note 0 Max (Note 3) OUT CC Outputs Open ( mA) OUT V = Max MHz CC and I (or I and I ). OZL IH OZH PALCE16V8H-10 (Com’l, Ind Operating Min Max , V = Min 2 Min 0.5 CC 2.0 0.8 10 –100 10 –100 –30 –150 115 ...
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... CF 1/( and t are defined under best case conditions. Future process improvements PZX PXZ EA ER can be found using the following equation: CF PALCE16V8H-10 (Com’l, Ind) Typ Unit 5 ° MHz 8 pF -10 2 Min Max Unit ...
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... Max OUT (Note 0 Max (Note 3) OUT CC Outputs Open ( mA), OUT V = Max MHz CC and I (or I and I ). OZL IH OZH PALCE16V8Q-10 (Com’ Min Max , V = Min 2 Min 0.5 CC 2.0 0.8 10 –100 10 –100 –30 –150 55 Unit µ ...
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... CNT S CF 1/( and t are defined under best case conditions. Future process improvements PZX PXZ EA ER can be found using the following equation: CF PALCE16V8Q-10 (Com’l) Typ Unit 5 ° MHz -10 2 Min Max Unit ...
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... Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed one second 0.5 V has been chosen to avoid test problems caused by tester ground degradation. OUT PALCE16V8H-15/25 (Com’l, Ind), Q-15/25 (Com’l), Q-20/25 (Ind) OPERATING RANGES Commercial (C) Devices Ambient Temperature (T Operating in Free Air . . . . . . . . . . . . . . . 0° ...
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... These parameters are not 100% tested, but are calculated at initial characterization and at any time the design is modified where frequency may be affected calculated value and is not guaranteed 1/f (internal feedback) – MAX S 18 PALCE16V8H-15/25 (Com’l, Ind), Q-15/25 (Com’l), Q-20/25 (Ind) Test Conditions 2 5 °C, V OUT = 2 MHz -15 -20 Min Max Min 15 12 ...
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... Max OUT (Note 0 Max (Note 4) OUT CC Outputs Open ( mA) OUT V = Max CC and I (or I and I ). OZL IH OZH PALCE16V8Z-12 (Ind Min Max 3. µA V – µA 0.1 OL 2.0 0.9 10 – ...
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... CNT S CF 1/( and t are defined under best case conditions. Future process improvements PZX PXZ EA ER can be found using the following equation: CF PALCE16V8Z-12 (Ind) Typ Unit 5 ° MHz -12 Min Max Unit ...
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... Max OUT (Note 0 Max (Note 4) OUT CC Outputs Open ( mA) OUT V = Max CC and I (or I and I ). OZL IH OZH PALCE16V8Z-15 (Ind Min Max 3. µA V – µA 0.1 OL 2.0 0.9 10 – ...
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... S 22 Test Conditions 2 5 °C, V OUT = 2 MHz Parameter Description 1/( 1/( CNT S CF 1/( can be found using the following equation: CF PALCE16V8Z-15 (Ind) Typ Unit -15 2 Min Max Unit MHz 58 ...
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... Max OUT (Note 0 Max (Note 4) OUT CC Outputs Open ( mA) OUT V = Max CC and I (or I and I ). OZL IH OZH PALCE16V8Z-25 (Com’l, Ind Operating Min Max 3. µA V – µ ...
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... Test Conditions 2 5 °C, V OUT = 2 MHz Parameter Description 1/( 1/( CNT S CF 1/( can be found using the following equation: CF PALCE16V8Z-25 (Com’l, Ind) Typ Unit -25 2 Min Max Unit 33.3 ...
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... Feedback Clock V T Registered 16493E-3 Output Input V T Output t WL 16493E-4 d. Input to output disable/enable PXZ V – output disable/enable PALCE16V8 and PALCE16V8Z Families 16493E-5 b. Registered output – 0. 0.5V OL 16493E-6 ...
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... Does Not Center Apply Line is High- Impedance “Off” State KS000010-PAL Output Test Point Commercial 200 5 pF H-5: 200 PALCE16V8 and PALCE16V8Z Families 16493E-8 R Measured Output Value 2 1.5 V 390 1 – ...
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... By utilizing 50% of the device, a midpoint is defined for I estimate the I requirements for a particular design Frequency (MHz) I vs. Frequency CC . From this midpoint, a designer may scale the I CC PALCE16V8 and PALCE16V8Z Families 16V8H-5 16V8H-7 16V8H-10 16V8H-15/25 16V8Z-12/15 16V8Q-10/15/25 16V8Z- 16493E-9 graphs up or down to ...
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... ENDURANCE CHARACTERISTICS The PALCE16V8 is manufactured using Vantis’ advanced electrically-erasable (EE) CMOS process. This technology uses an EE cell to replace the fuse link used in bipolar parts result, the device can be erased and reprogrammed—a feature which allows 100% testing at the factory. Symbol ...
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... Detection Clamping POWER-UP RESET The PALCE16V8 has been designed with the capability to reset during system power-up. Following power-up, all flip-flops will be reset to LOW. The output state will be HIGH independent of the logic polarity. This feature provides extra flexibility to the designer and is especially valuable in simplifying state machine initialization ...
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... Therefore, the measurements can only be used in a similar environment Figure 3. Power-Up Reset Waveform 200 lfpm air 400 lfpm air 600 lfpm air 800 lfpm air measurement relative to a specific location on the pack- jc PALCE16V8 and PALCE16V8Z Families V CC 16493E-12 Typ PDID PLCC Unit C/W 61 ...
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... PIN DESIGNATIONS CLK = Clock GND = Ground I = Input I/O = Input/Output OE = Output Enable V = Supply Voltage I/O 7 I OE/I 9 16493E-9 PALCE16V8 and PALCE16V8Z Families PLCC 16493E-10 31 ...
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... Consult the local Lattice/ /5 Vantis sales office to confirm availability of specific valid combinations and to check on newly released combinations PALCE16V8 and PALCE16V8Z Families PROGRAMMING DESIGNATOR Blank = Initial Algorithm /4 = First Revision /5 = Second Revision (Same Algorithm as /4) OPERATING CONDITIONS ° ...