LTC6104 LINER [Linear Technology], LTC6104 Datasheet - Page 11

• Manufacturer Part Number: LTC6104
• Description: High Voltage, High Side, Bi-Directional Current Sense Amplifi er
• Manufacturer: LINER [Linear Technology]

APPLICATIONS INFORMATION
If the maximum output current, I
R
device resistance) = 499.7Ω.
The output error due to DC offset is ±510µV (typ) and
the error due to offset current, I
300µV(typ).
The maximum output error can therefore reach ±810µV
or 0.027% (–71dB) of the output full scale. Considering
the system input 60dB dynamic range (I
±1A), the 71dB performance of the LTC6104 makes this
application feasible.
Output Error, E
I
When V
amplifi er A off. The output of amplifi er B drives an internal
current mirror which is connected to the OUT pin. This
current mirror has some error associated with it, and this
error can be calculated as follows:
The combined effect of amplifi er offset and current mirror
errors is shown graphically in Figure 4.
OUT-GAINERR
OUT
I
I
I
I
±0.2μA = ±2.2μA
E
OUT-GAINERR
OUT-GAINERR(MAX)
OUT-OSERR
OUT-ERR(MAX)
OUT-ERR(MAX)
equals 3V/1mA = 3k and R
SENSE
0.01
100
0.1
10
1
Figure 4. Output Error vs Input Voltage
–500
and I
= ±0.2μA
R
R
MAXIMUM
is negative, amplifi er B would be on and
IN
OUT
TYPICAL
OUT
= 100Ω
= ±0.2% • I
= I
= I
= 5k
–300
OUT-OSERR
, Due to the Current Mirror Errors,
OUT-GAINERR
OUT-ERR(MAX)
= ±2μA
–100
V
SENSE
(mV)
100
OUT
IN
+ I
• R
OUT
, with I
= 3k/6 – 0.3Ω (internal
OS
OUT-OSERR
300
OUT
, is limited to 1mA,
, is 3k • 100nA =
6104 F04
SENSE
500
OUT
= ±1mA to
= ±2μA +
= ±1mA,
Output Error, E
The LTC6104 uses the +INB pin for both the positive “B”
amplifi er input and the positive supply input for both
amplifi ers. If trace resistance (R
(Figure 5), this supply current can cause an input offset
error, which can be calculated as follows:
Trace resistances to the –IN terminals will increase the
effective R
dition, internal device resistance will add approximately
0.3Ω to R
Gain error equals:
Minimizing resistance in the input traces is important and
care should be taken in the PCB layout. Make the trace
short and wide. Kelvin connection to the shunt resistor
pad should be used. Avoid tapping into this signal along
Figure 5. Errors from PCB Traces and Other Parasitic Resistances
E
A
OUT OFFSET
V ERROR
(
(
CHARGER/LOAD
IN
IN
.
TO
value, causing a gain error (Figure 5). In ad-
)
LTC6104
=
)
OUT
=
R
V
V
IN
OUT
S
+
–
R
, Due to Trace Resistance
I
+ –
LOAD
8
OUT
+INA
T
R
+
A
T
•
R
+
–
R
1
I
OUT
R
S
T
OUT
V
–
I
REF
•
7
+ 0 3Ω
OUT
CURRENT
MIRROR
–INA
V
R
R
R
R
SENSE
SENSE
R
IN
T
OUT
.
IN
6
+
–INB
R
R
T
–
IN
T
) become signifi cant
R
4
R
V
OUT
–
–
IN
LTC6104
B
+
5
+INB
V
R
S
T
6104 F05
+
I
S
11
6104f