LTC6802IG-2 LINER [Linear Technology], LTC6802IG-2 Datasheet - Page 29

no-image

LTC6802IG-2

Manufacturer Part Number
LTC6802IG-2
Description
Multicell Addressable Battery Stack Monitor
Manufacturer
LINER [Linear Technology]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LTC6802IG-2
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Part Number:
LTC6802IG-2#3ZZTRPBF
Manufacturer:
MKNVRAM
Quantity:
1 200
Part Number:
LTC6802IG-2#3ZZTRPBF
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
LTC6802IG-2#PBF
Manufacturer:
LT
Quantity:
134
Part Number:
LTC6802IG-2#PBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Part Number:
LTC6802IG-2#TRPBF
Manufacturer:
LT
Quantity:
20 000
applicaTions inForMaTion
PROVIDING HIGH SPEED OPTO-ISOLATION
OF THE SPI DATA PORT
Isolation techniques that are capable of supporting the
1Mbps data rate of the LTC6802-2 require more power
on the isolated (battery) side than can be furnished by
the V
minimal, this means that a DC/DC function must be imple-
mented along with a suitable data isolation circuit, such as
shown in Figure 16. Here an optimal Avago 4-channel (3/1
bidirectional) opto-coupler is used, with a simple isolated
supply generated by an LTC1693-2 configured as a 200kHz
oscillator. The DC/DC function provides an unregulated
logic voltage (~4V) to the opto-coupler isolated side,
from energy provided by host-furnished 5V. This circuit
provides totally galvanic isolation between the batteries
and the host processor, with an insulation rating of 560V
continuous, 2500V transient. The Figure 16 functionality
is included in the LTC6802-2 demo board.
REG
LTC6802-2
output of the LTC6802-2. To keep battery drain
V
CSBI
SCKI
SDO
REG
SDI
V
249
3.57k
1µF
ISOLATED V
3.57k
100nF
Figure 16. Providing an Isolated High-Speed Data Interface
BAT54S
3.57k
LOGIC
BAT54S
6
4
PE68386
ACSL-6410
1
3
PCB LAYOUT CONSIDERATIONS
The V
capacitor for best performance.
The LTC6802-2 is capable of operation with as much as
60V between V
layout to maintain physical separation of traces at different
potentials. The pinout of the LTC6802-2 was chosen to
facilitate this physical separation. Figure 17 shows the DC
voltage on each pin with respect to V
battery cells are connected to the LTC6802-2. There is no
more then 5.5V between any two adjacent pins. The pack-
age body is used to separate the highest voltage (43.5V)
from the lowest voltage (0V).
33nF
REG
330
and V
+
REF
and V
TP0610K
100k
4.99k
pins should be bypassed with a 1µF
V
OUT1
V
OUT2
CC1
CC2
LTC1693-2
330
. Care should be taken on the PCB
1µF
GND1
GND2
IN1
IN2
TP0610K
100k
330
LTC6802-2
10k
TP0610K
100k
when twelve 3.6V
470pF
68022 F16
20k
+5V_HOST
CSBI
SDI
SCKI
SDO
GND_HOST

68022fa

Related parts for LTC6802IG-2