IS61C256AL-10J ISSI [Integrated Silicon Solution, Inc], IS61C256AL-10J Datasheet - Page 4

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IS61C256AL-10J

Manufacturer Part Number
IS61C256AL-10J
Description
32K X 8 HIGH-SPEED CMOS STATIC RAM
Manufacturer
ISSI [Integrated Silicon Solution, Inc]
Datasheet
IS61C256AL
READ CYCLE SWITCHING CHARACTERISTICS
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST LOADS
4
AC TEST CONDITIONS
Symbol
and output loading specified in Figure 1.
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Levels
Output Load
t
t
t
t
t
t
t
t
t
t
t
RC
AA
OHA
ACS
DOE
HZOE
LZCS
HZCS
LZOE
PU
PD
(3)
(3)
OUTPUT
(2)
(2)
(2)
(2)
5V
Including
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE Access Time
OE Access Time
OE to Low-Z Output
OE to High-Z Output
CE to Low-Z Output
CE to High-Z Output
CE to Power-Up
CE to Power-Down
jig and
scope
30 pF
Figure 1
480 Ω
See Figures 1 and 2
0V to 3.0V
1.5V
Unit
3 ns
255 Ω
Integrated Silicon Solution, Inc. — www.issi.com —
Min.
10
-10 ns
2
0
2
0
(1)
Max
(Over Operating Range)
10
10
10
6
5
5
OUTPUT
Min. Max.
12
5V
2
0
3
0
-12 ns
Including
12
12
12
6
6
7
jig and
scope
5 pF
Figure 2
480 Ω
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ISSI
1-800-379-4774
255 Ω
10/23/06
Rev. B
®

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