ICS8535AG-21 ICST [Integrated Circuit Systems], ICS8535AG-21 Datasheet - Page 8

• Manufacturer Part Number: ICS8535AG-21
• Description: LOW SKEW, 1-TO-2 LVCMOS/LVTTL-TO-3.3V LVPECL FANOUT BUFFER
• Manufacturer: ICST [Integrated Circuit Systems]

T
The clock layout topology shown below is a typical termina-
tion for LVPECL outputs. The two different layouts mentioned
are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, termi-
nating resistors (DC current path to ground) or current sources
must be used for functionality. These outputs are designed to
8535AG-21
RTT =
ERMINATION FOR
((V
F
FOUT
OH
IGURE
+ V
OL
Integrated
Circuit
Systems, Inc.
2A. LVPECL O
) / (V
1
LVPECL O
CC
Z
Z
– 2)) – 2
o
o
= 50
= 50
Z
o
50
UTPUT
UTPUTS
T
A
RTT
ERMINATION
50
PPLICATION
www.icst.com/products/hiperclocks.html
V
CC
LVCMOS/LVTTL-
FIN
- 2V
8
I
drive 50 transmission lines. Matched impedance techniques
should be used to maximize operating frequency and minimize
signal distortion. Figures 2A and 2B show two different layouts
which are recommended only as guidelines. Other suitable
clock layouts may exist and it would be recommended that the
board designers simulate to guarantee compatibility across all
printed circuit and clock component process variations.
NFORMATION
FOUT
F
IGURE
TO
-3.3V LVPECL F
2B. LVPECL O
Z
Z
o
o
= 50
= 50
125
84
UTPUT
L
ICS8535-21
OW
3.3V
125
84
T
ANOUT
S
ERMINATION
REV. A OCTOBER 20, 2004
KEW
FIN
, 1-
B
UFFER
TO
-2