CY7C1380D CYPRESS [Cypress Semiconductor], CY7C1380D Datasheet - Page 13

• Manufacturer Part Number: CY7C1380D
• Description: 18-Mbit (512K x 36/1M x 18) Pipelined SRAM
• Manufacturer: CYPRESS [Cypress Semiconductor]

Document #: 38-05543 Rev. *A
3.3V TAP AC Test Conditions
Input pulse levels ................................................ V
Input rise and fall times ..................... ..............................1 ns
Input timing reference levels ...........................................1.5V
Output reference levels...................................................1.5V
Test load termination supply voltage...............................1.5V
3.3V TAP AC Output Load Equivalent
TAP DC Electrical Characteristics And Operating Conditions
(0°C < TA < +70°C; Vdd = 3.3V ±0.165V unless otherwise noted)
Identification Register Definitions
V
V
V
V
V
V
I
Revision Number (31:29)
Device Depth (28:24)
Device Width (23:18)
Cypress Device ID (17:12)
Cypress JEDEC ID Code (11:1)
ID Register Presence Indicator (0)
Notes:
12. All voltages referenced to V
13. Bit #24 is “1” in the Register Definitions for both 2.5v and 3.3v versions of this device.
X
OH1
OH2
OL1
OL2
IH
IL
Parameter
TDO
Instruction Field
Z = 50
O
Output HIGH Voltage
Output HIGH Voltage
Output LOW Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Load Current
[13]
SS
Description
(GND).
1.5V
20pF
00000110100
50
CY7C1380D
(512K x 36)
I
I
I
I
I
GND < V
000000
100101
OH
OH
OH
OL
OL
01011
000
1
= 8.0 mA
= 100 µA
= –4.0 mA, V
= –1.0 mA, V
= –100 µA
SS
PRELIMINARY
to 3.3V
IN
< V
Test Conditions
DDQ
00000110100
(1 Mbit x 18)
CY7C1382D
DDQ
DDQ
000000
010101
01011
[12]
000
2.5V TAP AC Test Conditions
Input pulse levels
Input rise and fall time .....................................................1 ns
Input timing reference levels................... ......................1.25V
Output reference levels .................. ..............................1.25V
Test load termination supply voltage .................... ........1.25V
2.5V TAP AC Output Load Equivalent
= 3.3V
= 2.5V
1
V
V
V
V
V
V
V
V
V
V
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
TDO
Describes the version number.
Reserved for Internal Use
Defines memory type and architecture
Defines width and density
Allows unique identification of SRAM vendor.
Indicates the presence of an ID register.
= 3.3V
= 2.5V
= 3.3V
= 2.5V
= 3.3V
= 2.5V
= 3.3V
= 2.5V
= 3.3V
= 2.5V
......................................... V
Z = 50
O
Min.
–0.3
–0.3
2.4
2.0
2.9
2.1
2.0
1.7
–5
Description
1.25V
V
V
DD
DD
Max.
CY7C1380D
CY7C1382D
0.4
0.4
0.2
0.2
0.8
0.7
5
+ 0.3
+ 0.3
20pF
50
Page 13 of 29
SS
to 2.5V
Unit
µA
V
V
V
V
V
V
V
V
V
V
V
V