VSC8140QR VITESSE [Vitesse Semiconductor Corporation], VSC8140QR Datasheet - Page 17

• Manufacturer Part Number: VSC8140QR
• Description: 2.48832Gb/s 16:1 SONET/SDH Transceiver with Integrated Clock Generator
• Manufacturer: VITESSE [Vitesse Semiconductor Corporation]

VSC8140
Data Sheet
9/6/00
G52251-0, Rev. 4.0
Table 3: DC Characteristics
DC Characteristics
Parameters
V
V
V
R
V
V
V
V
I
I
R
V
V
V
V
V
I
I
V
P
I
IH
IL
IH
IL
CC
D
V
V
V
V
HSO
i
OHHSO
OLHSO
CMHSO
OHL
OL
IH
IL
CM
OH
OL
IH
IL
CC
ODHSO
IHS
O
I
Output HIGH voltage (TXOUT,
TXCLKOUT)
Output LOW voltage (TXOUT,
TXCLKOUT)
Output differential voltage
(TXCLKOUT)
Output differential voltage
(TXOUT)
Output common-mode voltage
Back termination impedance
Serial input differential voltage
(RXIN, RXCLKIN)
Output HIGH voltage (LVPECL)
Output LOW voltage (LVPECL)
Low-speed output voltage single-
ended, peak-to-peak swing
(LVPECL)
Input HIGH voltage (LVPECL)
Input LOW voltage(LVPECL)
Input HIGH current (LVPECL)
Input LOW current (LVPECL)
Input Resistance (LVPECL)
Input differential voltage
(LVPECL)
Input common-mode voltage
(LVPECL)
Output HIGH voltage (TTL)
Output LOW voltage (TTL)
Input HIGH voltage (TTL)
Input LOW voltage (TTL)
Input HIGH Current (TTL)
Input LOW current (TTL)
Supply voltage
Power dissipation
Supply current
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: [phone]
Description
(Over recommended operating conditions)
VITESSE
VITESSE SEMICONDUCTOR CORPORATION
SEMICONDUCTOR CORPORATION
V
V
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
Min
CC
CC
3.14
450
500
200
600
10k
200
-50
2.0
2.4
0.0
40
—
—
—
—
—
—
-1.020
-2.000
-1.100
-0.40
-1.20
-1.20
-2.0
-1.5
Typ
2.25
600
600
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Transceiver with Integrated Clock Generator
V
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
Max
1000
1000
1300
CC
V
-500
3.47
2.75
200
500
800
0.5
5.5
0.8
60
—
—
—
—
—
-0.300
-0.700
-1.620
-0.700
-1.540
CC
-0.50
-0.5
2.48832Gb/s 16:1 SONET/SDH
Units
mA
mV
mV
mV
mV
µA
µA
µA
µA
W
V
V
V
V
V
V
V
V
V
V
V
V
V
See Figure 24
See Figure 24
V
—
Outputs open
Outputs open
50 termination to V
50 termination to V
100 termination between ±
output at load. See Figure 13.
100 termination between ±
output at load. See Figure 13.
Guaranteed, but not tested
AC-coupled, internally
biased to (V
See Figure 24
—
—
V
—
—
—
I
I
—
V
V
3.3V± 5%
OH
OL
IN
IN
IN
IN
=V
=V
= +1.0mA
= 2.4V
= 0.5V
= -1.0mA
IH
IL
(min)
Conditions
(max)
CC
+V
EE
)/2.
CC
CC
Page 17