VSC8140QR VITESSE [Vitesse Semiconductor Corporation], VSC8140QR Datasheet - Page 25

• Manufacturer Part Number: VSC8140QR
• Description: 2.48832Gb/s 16:1 SONET/SDH Transceiver with Integrated Clock Generator
• Manufacturer: VITESSE [Vitesse Semiconductor Corporation]

VSC8140
Data Sheet
9/6/00
G52251-0, Rev. 4.0
Table 5: Package Pin Identification - 208 BGA
Pin #
M1
M2
M3
M4
B3
D4
C3
C1
D1
G4
G3
G2
H3
H2
G1
H1
K1
K2
K3
K4
F4
F3
E1
F2
F1
L1
L2
L3
L4
P1
J2
J4
J3
REF_FREQSEL
TXPARITYIN
TXCLK16O+
LPTIMCLK+
TXCLK16O-
FIFORESET
LPTIMCLK-
TXCLK16I+
TXCLK16I-
LOOPTIM0
PARMODE
LOOPTIM1
VCC_ANA
VEE_ANA
FACLOOP
REFCLK+
REFCLK-
FILTAON
FILTAIN
FILTAO
TXIN15
TXIN14
FILTAI
Name
VCC
VCC
VEE
VEE
VEE
VCC
VCC
VEE
VCC
VEE
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: [phone]
I/O
VITESSE
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
VITESSE SEMICONDUCTOR CORPORATION
SEMICONDUCTOR CORPORATION
+3.3V typ. Positive power supplies for analog parts of CMU
GND typ.
GND typ.
GND typ.
GND typ.
GND typ.
GND typ.
3.3V typ.
3.3V typ.
LVPECL
LVPECL
LVPECL
LVPECL
3.3V typ.
3.3V typ.
LVPECL
LVPECL
LVPECL
LVPECL
3.3V typ.
LVPECL
LVPECL
LVPECL
Level
TTL
TTL
TTL
TTL
TTL
TTL
—
—
—
—
Positive power supply
Positive power supply
Negative power supply
Facility loopback, active high
Enable internal looptiming operation, active high
Parity mode select
Reset to align FIFO write and read pointers
Enable external loop timing operation, active high
Reference clock input select
Negative power supply
External loop timing clock, true
Negative power supplies for analog parts of CMU
Reference clock input, true
Reference clock input,complement
Negative power supply
Positive power supply
Loop filter pin - connect via capacitor to FILTAI (pin 53)
Loop filter pin - connect via capacitor to FILTAIN (pin 54)
Loop filter pin - connect via capacitor to FILTAO (pin 51)
Loop filter pin - connect via capacitor to FILTAON (pin 52)
Positive power supply
Low-speed clock output, true. A divide-by-16 version of the PLL
clock.
Low-speed clock output, complement. A divide-by-16 version of the
PLL clock.
Negative power supply
Low-speed clock input for latching low-speed data, complement
Low-speed clock input for latching low-speed data, true
Positive power supply
Transmitter parity bit input
Low-speed single-ended data (MSB)
Low-speed single-ended data
Negative power supply
External loop timing clock, complement
Transceiver with Integrated Clock Generator
Description
2.48832Gb/s 16:1 SONET/SDH
(1)
Page 25