LMX2542LQ2121 NSC [National Semiconductor], LMX2542LQ2121 Datasheet - Page 18

no-image

LMX2542LQ2121

Manufacturer Part Number
LMX2542LQ2121
Description
PLLatinum Cellular and GPS Frequency Synthesizer System with Integrated VCO
Manufacturer
NSC [National Semiconductor]
Datasheet
www.national.com
Reg
R1
2.0 Programming Description
2.3 R1 REGISTER
The R1 register contains the FREQ_OFF, RF_EN and OB_CRL control words. The register address bits are R1[1:0] = 01. The
detailed descriptions and programming information for each control word is discussed in the following sections.
2.3.1 FREQ_OFF - RF Synthesizer System Frequency Offset (R1[2])
The FREQ_OFF bit is used to offset the RF frequency by +5 kHz.
2.3.2 RF_EN - RF Synthesizer System Enable (R1[3])
The RF_EN bit is used to switch the RF synthesizer system (PLL and VCO) between a powered up and powered down mode.
2.3.3 OB_CRL[1:0] - RF VCO Output Buffer Power Control (R1[5:4])
The OB_CRL word is used to set the RF VCO output buffer power level. The power level can be set according to the system
requirements.
MSB
23
0
22
1
Control Bit
FREQ_OFF
Control Bit
RF_EN
21
1
0
0
1
1
20
0
19
OB_CRL[1:0]
1
18
Register Location
Register Location
0
17
0
R1[2]
R1[3]
16
0
15
1
0
1
0
1
SHIFT REGISTER BIT LOCATION
14
(Continued)
0
RF Synthesizer
System Frequency
Offset
RF Synthesizer
System Enable
DATA[21:0]
13
Description
Description
1
12
18
0
11
1
10
0
RF Synthesizer
System Frequency
Offset Disabled
RF Synthesizer
System Powered
Down
RF VCO Output Buffer Power Level
9
1
8
0
0
0
7
0
(dBm)
Function
Function
−4.5
−2.0
0.5
3.0
6
1
RF Synthesizer
System Frequency
Offset Enabled
RF Synthesizer
System Active
OB_CRL
5
[1:0]
4
1
1
RF_
EN
3
FREQ_
OFF
2
ADDRESS
1
0
FIELD
[1:0]
LSB
0
1

Related parts for LMX2542LQ2121