LMX2542LQ2121 NSC [National Semiconductor], LMX2542LQ2121 Datasheet - Page 3

• Manufacturer Part Number: LMX2542LQ2121
• Description: PLLatinum Cellular and GPS Frequency Synthesizer System with Integrated VCO
• Manufacturer: NSC [National Semiconductor]

Pin No.
Connection Diagram
Note: Analog GND connected through exposed die attached pad.
Pin Description
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
Pin Name
CPout
DATA
RFout
CLK
V
V
V
V
V
NC
NC
NC
NC
NC
Fin
LE
CC
DD
DD
DD
CC
I/O
—
—
—
—
—
—
—
—
—
—
O
O
I
I
I
I
IF PLL buffer/prescaler input. Small signal input from the VCO.
Power supply bias for the IF PLL analog circuits. V
Bypass capacitors should be placed as close as possible to this pin and be connected
directly to the ground plane on the printed circuit board.
IF PLL charge pump output. The output is connected to the external loop filter, which
drives the input of the IF VCO.
No Connect. Do not connect to any node on the printed circuit board.
MICROWIRE Latch Enable Input. High impedance CMOS input. When LE transitions
from LOW to HIGH, DATA stored in the shift register is loaded into one of 6 internal
control registers.
MICROWIRE Clock Input. High impedance CMOS input. DATA is clocked into the 24-bit
shift register on the rising edge of CLK.
MICROWIRE Data Input. High impedance CMOS input. Binary serial data. The MSB of
DATA is shifted in first.
Power supply bias for the RF VCO. V
capacitors should be placed as close as possible to this pin and be connected directly
to the ground plane on the printed circuit board.
No Connect. Do not connect to any node on the printed circuit board.
No Connect. Do not connect to any node on the printed circuit board.
No Connect. Do not connect to any node on the printed circuit board.
No Connect. Do not connect to any node on the printed circuit board.
Power supply bias for the RF VCO. V
capacitors should be placed as close as possible to this pin and be connected directly
to the ground plane on the printed circuit board.
Power supply bias for the RF VCO output buffer. V
Bypass capacitors should be placed as close as possible to this pin and be connected
directly to the ground plane on the printed circuit board.
Buffered RF VCO output.
Power supply bias for the RF PLL prescaler. V
capacitors should be placed as close as possible to this pin and be connected directly
to the ground plane on the printed circuit board.
Leadless Leadframe Package (LQ)
(Top View)
3
DD
DD
Description
20082402
may range from 2.7V to 3.3V. Bypass
may range from 2.7V to 3.3V. Bypass
CC
may range from 2.7V to 3.3V. Bypass
CC
DD
may range from 2.7V to 3.3V.
may range from 2.7V to 3.3V.
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