AD9520-5 AD [Analog Devices], AD9520-5 Datasheet - Page 20
![no-image](/images/no-image-200.jpg)
AD9520-5
Manufacturer Part Number
AD9520-5
Description
12 LVPECL/24 CMOS Output Clock Generator
Manufacturer
AD [Analog Devices]
Datasheet
1.AD9520-5.pdf
(80 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD9520-5BCPZ
Manufacturer:
Analog Devices Inc
Quantity:
135
- Current page: 20 of 80
- Download datasheet (2Mb)
AD9520-5
TYPICAL PERFORMANCE CHARACTERISTICS
350
300
250
200
150
100
Figure 6. Total Current vs. Frequency, CLK-to-Output (PLL Off),
Figure 7. Total Current vs. Frequency, CLK-to-Output (PLL Off),
240
220
200
180
160
140
120
100
80
5
4
3
2
1
0
0
0
0
Figure 8. Charge Pump Characteristics @ VCP = 3.3 V
LVPECL Outputs Terminated 50 Ω to VS_DRV − 2 V
PUMP DOWN
0.5
500
50
CMOS Outputs with 10 pF Load
1.0
3 CHANNELS—6 LVPECL
3 CHANNELS—3 LVPECL
2 CHANNELS—2 LVPECL
1000
1 CHANNEL—1 LVPECL
VOLTAGE ON CP PIN (V)
FREQUENCY (MHz)
3 CHANNELS—6 CMOS
FREQUENCY (MHz)
100
1.5
1500
2.0
150
3 CHANNELS—3 CMOS
2 CHANNELS—2 CMOS
1 CHANNEL—1 CMOS
2000
PUMP UP
2.5
200
2500
3.0
3000
250
3
.5
Rev. 0 | Page 20 of 80
Figure 10. PFD Phase Noise Referred to PFD Input vs. PFD Frequency
Figure 11. PLL Figure of Merit (FOM) vs. Slew Rate at REFIN/ REFIN
–208
–210
–212
–214
–216
–218
–220
–222
–224
–140
–145
–150
–155
–160
–165
–170
5
4
3
2
1
0
0
0.1
0
Figure 9. Charge Pump Characteristics @ VCP = 5.0 V
SINGLE-ENDED INPUT
PUMP DOWN
0.5
0.2
DIFFERENTIAL INPUT
1.0
0.4
1.5
INPUT SLEW RATE (V/ns)
VOLTAGE ON CP PIN (V)
PFD FREQUENCY (MHz)
1
2.0
0.6
2.5
0.8
3.0
10
3.5
1.0
PUMP UP
4.0
1.2
4.5
1.4
5
100
.0
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