CY7C1518AV18 CYPRESS [Cypress Semiconductor], CY7C1518AV18 Datasheet - Page 14

• Manufacturer Part Number: CY7C1518AV18
• Description: 72-Mbit DDR-II SRAM Two-Word Burst Architecture
• Manufacturer: CYPRESS [Cypress Semiconductor]

TAP Controller Block Diagram
TAP Electrical Characteristics
Over the Operating Range
Notes
Document Number: 001-06982 Rev. *I
V
V
V
V
V
V
I
12. These characteristics pertain to the TAP inputs (TMS, TCK, TDI and TDO). Parallel load levels are specified in the
13. Overshoot: V
14. All voltage referenced to ground.
X
Parameter
OH1
OH2
OL1
OL2
IH
IL
TDI
TCK
TMS
IH
(AC) < V
Output HIGH voltage
Output HIGH voltage
Output LOW voltage
Output LOW voltage
Input HIGH voltage
Input LOW voltage
Input and output load current
DDQ
Selection
Circuitry
+ 0.85 V (Pulse width less than t
[12, 13, 14]
Description
108
31
Boundary Scan Register
CYC
30
Identification Register
.
Instruction Register
/2), Undershoot: V
29
.
TAP Controller
.
.
.
.
IL
(AC) >
I
I
I
I
GND  V
Bypass Register
OH
OH
OL
OL
2
2
2
= 2.0 mA
= 100 A
=2.0 mA
=100 A

Test Conditions
1.5 V (Pulse width less than t
1
1
1
I
0
 V
0
0
0
DD
Electrical Characteristics on page
Selection
Circuitry
CYC
0.65 × V
/2).
–0.3
Min
1.4
1.6
–5
–
–
CY7C1518AV18
CY7C1520AV18
DD
0.35 × V
V
DD
Max
0.4
0.2
–
–
5
+ 0.3
Page 14 of 29
19.
DD
TDO
Unit
A
V
V
V
V
V
V
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