CY7C421 CYPRESS [Cypress Semiconductor], CY7C421 Datasheet
CY7C421
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CY7C421 Summary of contents
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... Pin Compatible and Functionally Equivalent to IDT7201, and ■ AM7201 Functional Description The CY7C421 is a first-in first-out (FIFO) memory offered in 300-mil wide SOJ, TQFP & PLCC packages and it is 512 words by 9 bits wide. Each FIFO memory is organized such that the Selection Guide 512 × ...
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... Logic Block Diagram Document Number: 38-06001 Rev. *H DATA INPUTS (D 0 – WRITE RAM ARRAY CONTROL 512 x 9 WRITE POINTER POINTER THREE- STATE BUFFERS DATA OUTPUTS (Q 0 – READ CONTROL FLAG EF LOGIC FF EXPANSION LOGIC XO/HF CY7C421 READ MR RESET LOGIC FL/RT Page ...
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... Standalone/Width Expansion Modes ........................ 13 Depth Expansion Mode ............................................. 13 Use of the Empty and Full Flags ............................... 14 Ordering Information ...................................................... 15 Ordering Code Definitions ......................................... 15 Package Diagrams .......................................................... 16 Acronyms ........................................................................ 19 Document Conventions ................................................. 19 Units of Measure ....................................................... 19 Document History Page ................................................. 20 Sales, Solutions, and Legal Information ...................... 21 Worldwide Sales and Design Support ....................... 21 Products .................................................................... 21 PSoC Solutions ......................................................... 21 CY7C421 Page ...
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... XO/ GND CY7C421 Figure 3. 32-pIn TQFP (Top View) 32 3130 FL/ 7C421 XO/ ...
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... Cascaded: Connected pervious device Non-Cascaded: Connected Non-Cascaded: Connected FIFO Reset Causes FIFO to retransmit the data Width expansion: Connected Depth expansion: when Gnd indicates that part is first to be loaded all others connected Voltage Supply Ground CY7C421 Function Page ...
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... All Inputs = V Min Commercial IH Industrial All Inputs > V – 0.2 V Commercial CC Industrial Test Conditions ° MHz 4 CY7C421 [2] Ambient Temperature 10% 0 °C to +70 ° 10% –40 °C to +85 °C All Speed Grades Min Max 2.4 – – 0.4 2 ...
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... Equivalent to: THÉ VENIN EQUIVALENT 200 OUTPUT Document Number: 38-06001 Rev. *H Figure 4. AC Test Loads and Waveforms R1 500 3.0 V GND 333 INCLUDING JIGAND SCOPE ( CY7C421 ALL INPUT PULSES 90% 90% 10% 10% Page ...
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... HZR DVR Document Number: 38-06001 Rev. *H Description and –200 mV from transition is measured at the 1.5V level DVR Figure 4 on page 7. CY7C421 -15 -20 Min Max Min Max 25 – 30 – 15 – 10 – – ...
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... DVR DATA VALID DATA VALID DATA VALID Figure 6. Master Reset [10] t MRSC t PMR t RPW t WPW t EFL t HFH t FFH Figure 7. Half-full Flag HALF FULL+1 t WHF CY7C421 t HZR DATA VALID t RMR HALF FULL t RHF Page ...
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... Document Number: 38-06001 Rev. *H Figure 8. Last Write to First Read Full Flag ADDITIONAL FIRST READ READS t RFF Figure 9. Last Read to First Write Empty Flag ADDITIONAL FIRST WRITE WRITES t WEF [11] Figure 10. Retransmit [12] t RTC t PRT t RTR CY7C421 FIRST WRITE FIRST READ VALID . RTC Page ...
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... Figure 12. Full Flag and Write Data Flow-through Mode D0– Q0–Q8 DATA VALID Document Number: 38-06001 Rev RAE t RPE t REF t WEF HWZ DATA VALID t t WAF WPF t t RFF WFF DATA VALID t SD CY7C421 t HD Page ...
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... Figure 13. Expansion Timing Diagrams WRITE TO FIRST PHYSICAL LOCATION OF DEVICE XOL XOH DATA VALID READ FROM FIRST PHYSICAL LOCATION OF DEVICE XOH t DVR DATA VALID ). 2 CY7C421 DATA VALID t HZR t DVR DATA VALID t A Page ...
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... Architecture The CY7C421 FIFO consist of an array of 512 words of 9 bits each (implemented by an array of dual-port RAM cells), a read pointer, a write pointer, control signals (W, R, XI, XO, FL, RT, MR), and Full, Half Full, and Empty flags. Dual-Port RAM The dual-port RAM architecture refers to the basic memory cell used in the RAM ...
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... Figure 14. Depth Expansion CY7C421 CY7C421 CY7C421 FIRST DEVICE CY7C421 EMPTY Page ...
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... Package Type 32-pin TQFP J = 32-pin PLCC V = 28-pin Molded SOJ Speed Depth 512 Width × FIFO Technology Code CMOS Marketing Code SRAM Company ID Cypress CY7C421 Package Type Commercial Commercial Industrial Page Operating Range ...
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... Package Diagrams Figure 15. 32-pin TQFP (7 × 7 × 1.0 mm) A3210 Package Outline, 51-85063 Document Number: 38-06001 Rev. *H CY7C421 51-85063 *D Page ...
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... Package Diagrams (continued) Figure 16. 32-pin PLCC (0.453 × 0.553 Inches) J32 Package Outline, 51-85002 Document Number: 38-06001 Rev. *H CY7C421 51-85002 *D Page ...
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... Package Diagrams (continued) Figure 17. 28-pin SOJ (300 Mils) V28.3 (Molded SOJ V21) Package Outline, 51-85031 Document Number: 38-06001 Rev. *H CY7C421 51-85031 *E Page ...
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... SOJ small outline J-lead TQFP thin quad flat pack TTL transistor-transistor logic Document Number: 38-06001 Rev. *H Document Conventions Units of Measure Symbol Unit of Measure °C degree Celsius MHz megahertz µA microampere mA milliampere mm millimeter mV millivolt ns nanosecond % percent pF picofarad V volt W watt CY7C421 Page ...
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... Updated Ordering Information Updated Package Diagrams. Updated links in Sales, Solutions, and Legal Information 12/14/2010 Added Ordering Code Definitions. 07/26/2011 Updated title to read as “CY7C421, 512 × 9 Asynchronous FIFO”. Updated Features. Updated Functional Description CY7C420/424/425/428/429/432/433). Updated Selection Guide Updated Electrical Characteristics -65). Updated Switching Characteristics -65) ...
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... Use may be limited by and subject to the applicable Cypress software license agreement. Document Number: 38-06001 Rev. *H All products and company names mentioned in this document may be the trademarks of their respective holders. cypress.com/go/plc cypress.com/go/psoc cypress.com/go/touch cypress.com/go/USB Revised August 7, 2012 CY7C421 PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 | PSoC 5 ...