MC145106DW MOTOROLA [Motorola, Inc], MC145106DW Datasheet - Page 4

• Manufacturer Part Number: MC145106DW
• Description: PLL FREQUENCY SYNTHESIZER CMOS
• Manufacturer: MOTOROLA [Motorola, Inc]

1: Voltage level = V DD .
0: Voltage level = 0 or open circuit input.
* The binary setting of 00000000 and 00000001 on P8 to P0 results
P0 – P8
Programmable Inputs (PDIP — Pins 17 – 9; SOG — Pins
19, 17 – 14, 12 – 9)
f in
Frequency Input (PDIP, SOG — Pin 2)
VCO).
OSC in , OSC out
Oscillator Input and Oscillator Output (PDIP, SOG —
Pins 3, 4)
MOTOROLA
TRUTH TABLE
* Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
P8
in a 2 and 3 division which is not in the 2 N – 1 sequence. When pin
is not connected the logic signal on that pin can be treated as a “0”.
0
0
0
0
0
0
1






Programmable divider inputs (binary).
Frequency input to programmable divider (derived from
Oscillator/amplifier input and output terminals.
5.0
25
20
15
10
0
0
Figure 1. Maximum Divider Input Frequency
P7
0
0
0
0
0
1
1






P6
0
0
0
0
0
1
1






+ 85 C
P5
10
0
0
0
0
0
1
1






versus Supply Voltage
Selection
PIN DESCRIPTIONS
f in , MAXIMUM FREQUENCY (MHz)
P4
0
0
0
0
0
1
1






+ 25 C
P3
0
0
0
0
0
1
1
20






– 40 C
P2
0
0
0
0
1
1
1






P1
0
0
1
1
0
1
1






30
P0
0
1
0
1
0
1
1






TYPICAL CHARACTERISTICS*
Divide by N
40
255
511
2*
3*
2
3
4






50
LD
Lock Detector (PDIP, SOG — Pin 8)
lock.
less than the reference frequency; output low when f in /N is
greater than the reference frequency. Reference frequency is
the divided down oscillator — input frequency typically 5.0 or
10 kHz.
FS
Reference Oscillator Frequency Division Select (PDIP,
SOG — Pin 6)
10 kHz, a “0” selects 5.0 kHz.
10.24 MHz OSC frequency, this output is 5.12 MHz for fre-
quency tripling applications.
V DD
Positive Power Supply (PDIP, SOG — Pin 1)
V SS
Ground (PDIP — Pin 18, SOG — Pin 20)
5.0
Det out (PDIP, SOG — Pin 7)
25
20
15
10
2 out (PDIP, SOG — Pin 5)
0
LD is high when loop is locked, pulses low when out–of–
Signal for control of external VCO, output high when f in /N is
When using 10.24 MHz OSC frequency, this control selects
Reference OSC frequency divided by 2 output; when using
0
Figure 2. Maximum Oscillator Input Frequency
Phase Detector Gain = V DD /4 .
10
OSC in , MAXIMUM FREQUENCY (MHz)
versus Supply Voltage
20
NOTE
+ 85 C
30
+ 25 C
– 40 C
40
MC145106
50
4