AD2S80ASE AD [Analog Devices], AD2S80ASE Datasheet - Page 8

• Manufacturer Part Number: AD2S80ASE
• Description: Variable Resolution, Monolithic Resolver-to-Digital Converter
• Manufacturer: AD [Analog Devices]

AD2S80A
COMPONENT SELECTION
The following instructions describe how to select the external
components for the converter in order to achieve the required
bandwidth and tracking rate. In all cases the nearest “preferred
value” component should be used, and a 5% tolerance will not
degrade the overall performance of the converter. Care should
be taken that the resistors and capacitors will function over the
required operating temperature range. The components should
be connected as shown in Figure 1.
PG compatible software is available to help users select the optimum
component values for the AD2S80A, and display the transfer gain,
phase and small step response.
For more detailed information and explanation, see section “CIR-
CUIT FUNCTIONS AND DYNAMIC PERFORMANCE.”
1. HF Filter (R1, R2, C1, C2)
2. Gain Scaling Resistor (R4)
3. AC Coupling of Reference Input (R3, C3)
Values should be chosen so that
and f
The function of the HF filter is to remove any dc offset and
to reduce the amount of noise present on the signal inputs to
the AD2S80A, reaching the Phase Sensitive Detector and af-
fecting the outputs. R1 and C2 may be omitted—in which
case R2 = R3 and C1 = C3, calculated below—but their use
is particularly recommended if noise from switch mode power
supplies and brushless motor drive is present.
This filter gives an attenuation of three times at the input to
the phase sensitive detector.
If R1, C2 arc fitted then:
where 100
If R1, C2 are not fitted then:
where E
Select R3 and C3 so that there is no significant phase shift at
the reference frequency. That is,
with R3 in .
REF
DC
= Reference frequency
= 160
= 40
= 10
= 2.5
= Scaling of the DC ERROR in volts
10
–9
= current/LSB
R4
15 k
C1 C2
10
10
10
10
–3
–3
–3
–3
R3 100 k
C 3
100 10
R4
for 12 bits
for 14 bits
for 16 bits
for 10 bits resolution
E
R1 R2 56 k
2
DC
100 10
R3
R1 f
–9
E
1
1
DC
f
REF
REF
1
3
–9
F
(Hz)
–8–
4. Maximum Tracking Rate (R6)
5. Closed-Loop Bandwidth Selection (C4, C5, R5)
6. VCO Phase Compensation
7. Offset Adjust
where n = bits per revolution
d. R5 is given by
The VCO input resistor R6 sets the maximum tracking rate
of the converter and hence the velocity scaling as at the max
tracking rate, the velocity output will be 8 V.
Decide on your maximum tracking rate, “T,” in revolutions
per second. Note that “T” must not exceed the maximum
tracking rate or 1/16 of the reference frequency.
a. Choose the closed-loop bandwidth (f
Resolution
Typical values may be 100 Hz for a 400 Hz reference fre-
quency and 500 Hz to 1000 Hz for a 5 kHz reference
frequency.
b. Select C4 so that
with R6 in
c. C5 is given by
The following values of C6 and R7 should be fitted.
Offsets and bias currents at the integrator input can cause an
additional positional offset at the output of the converter of 1
arc minute typical, 5.3 arc minutes maximum. If this can be
tolerated, then R8 and R9 can be omitted from the circuit.
If fitted, the following values of R8 and R9 should be used:
To adjust the zero offset, ensure the resolver is disconnected
and all the external components are fitted. Connect the COS
pin to the REFERENCE INPUT and the SIN pin to the
SIGNAL GROUND and with the power and reference ap-
plied, adjust the potentiometer to give all “0s” on the digital
output bits.
The potentiometer may be replaced with select on test resis-
tors if preferred.
ensuring that the ratio of reference frequency to band-
width does not exceed the following guidelines:
10
12
14
16
= 1,024 for 10 bits resolution
= 4,096 for 12 bits
= 16,384 for 14 bits
= 65,536 for 16 bits
R8
and f
4.7 M , R9 1 M
C6
Ratio of Reference Frequency/Bandwidth
BW
R5
R6
, in Hz selected above.
470 pF, R7 68
C4
2
6. 32 10
7.5
C5 5 C4
T
2.5 : 1
4
6
R6 f
n
f
4
: 1
: 1
: 1
21
BW
10
BW
potentiometer
2
BW
C5
F
) required
REV. A