M41T00S_08 STMICROELECTRONICS [STMicroelectronics], M41T00S_08 Datasheet
M41T00S_08
Related parts for M41T00S_08
M41T00S_08 Summary of contents
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Features ■ 2.0 to 5.5 V clock operating voltage ■ Counters for seconds, minutes, hours, day, date, month, year, and century ■ Software clock calibration ■ Automatic switchover and deselect circuitry (fixed reference) – 2.7 to 5.5 V ...
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Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of tables Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Description The M41T00S Serial Access TIMEKEEPER in 32.768 kHz oscillator (external crystal controlled). Eight bytes of the SRAM (see on page 13) are used for the clock/calendar function and are configured in binary coded decimal (BCD) format. Addresses and ...
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Figure 2. 8-pin SOIC (M) connections 1. Open drain output Figure 3. Block diagram CRYSTAL SDA SCL BAT PFD 1. Open drain output 6/ FT/OUT M41T00S ...
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Operation The M41T00S clock operates as a slave device on the serial bus. Access is obtained by implementing a start condition followed by the correct slave address (D0h). The 8 bytes contained in the device can then be accessed ...
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Stop data transfer A change in the state of the data line, from low to high, while the clock is high, defines the STOP condition. 2.1.4 Data valid The state of the data line represents valid data when after ...
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Figure 5. Acknowledgement sequence START SCL FROM MASTER DATA OUTPUT BY TRANSMITTER DATA OUTPUT BY RECEIVER 2.2 READ mode In this mode the master reads the M41T00S slave after setting the slave address (see Figure 7 on page 10). Following ...
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Figure 7. READ mode sequence BUS ACTIVITY: MASTER SDA LINE S BUS ACTIVITY: SLAVE ADDRESS DATA n+X Figure 8. Alternative READ mode sequence BUS ACTIVITY: MASTER SDA LINE S BUS ACTIVITY: SLAVE ADDRESS 2.3 WRITE mode In this mode the ...
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Data retention mode With valid V applied, the M41T00S can be accessed as described above with READ or CC WRITE cycles. Should the supply voltage decay, the power input will be switched from the V pin to the battery ...
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Clock operation The 8-byte register map (see time from the clock binary coded decimal format. Seconds, minutes, and hours are contained within the first three registers. Bits D6 and D7 of clock register 02h (century/hours register) contain ...
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Table 2. TIMEKEEPER register map Addr 00h ST 10 seconds 01h OF 10 minutes 02h CEB CB 10 hours 03h 04h date 05h 06h 10 years 07h ...
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Therefore, each calibration step has the effect of adding 512 or subtracting 256 oscillator cycles for every 125,829,120 actual oscillator cycles, that is +4.068 or –2.034 ppm of adjustment per calibration step in the calibration register (see Assuming that the ...
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Figure 10. Crystal accuracy across temperature Frequency (ppm –20 –40 –60 –80 –100 –120 –140 –160 –40 –30 –20 Figure 11. Clock calibration NORMAL POSITIVE CALIBRATION NEGATIVE CALIBRATION 3.2.1 Century bit Bits D7 and D6 of Clock Register ...
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In the event the OF bit is found to be set to '1' at any time other than the initial power-up, the STOP bit (ST) should be written to a '1,' then immediately reset to '0.' This will restart the ...
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Maximum ratings Stressing the device above the rating listed in the “Absolute Maximum Ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above ...
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DC and AC parameters This section summarizes the operating and measurement conditions, as well as the DC and AC characteristics of the device. The parameters in the following DC and AC Characteristic tables are derived from tests performed under ...
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Table 7. DC characteristics Sym Parameter I Input leakage current LI I Output leakage current LO I Supply current CC1 I Supply current (standby) CC2 V Input low voltage IL V Input high voltage IH Output low voltage V OL ...
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Table 9. Power down/up AC characteristics Symbol t SCL and SDA SCL and SDA at V rec 1. V fall time should not exceed 5 mV/µ Valid for ambient operating temperature: T Table 10. ...
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Table 11. AC characteristics Sym Parameter f SCL clock frequency SCL t Clock low period LOW t Clock high period HIGH t SDA and SCL rise time R t SDA and SCL fall time F START condition hold time t ...
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Package mechanical information In order to meet environmental requirements, ST (also) offers these devices in ECOPACK packages. ECOPACK is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related ...
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Table 12. SO8 – 8-lead plastic small outline (150 mils body width), package mechanical data Symb Typ 4.90 E 6.00 E1 3. ccc mm Min Max ...
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Part numbering Table 13. Ordering information scheme Example: Device type M41T Supply voltage and write protect voltage 00S = V = 2 Package M = SO8 Temperature range 6 = –40°C to 85°C Shipping method ...
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Revision history Table 14. Document revision history Date Revision 10-Feb- 2004 20-Feb-2004 14-Apr-2004 05-May-2004 16-Jun-2004 13-Sep-2004 26-Nov-2004 14-May-2008 0.1 First draft 0.2 Update characteristics (Table Product promoted; reformatted; update characteristics, including 1.0 Lead-free package information 1.1 Update DC characteristics ...
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Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any ...