M41ST85WMX6F STMICROELECTRONICS [STMicroelectronics], M41ST85WMX6F Datasheet - Page 28
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M41ST85WMX6F
Manufacturer Part Number
M41ST85WMX6F
Description
3.0/3.3V I2C combination serial RTC, NVRAM supervisor and microprocessor supervisor
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.M41ST85WMX6F.pdf
(41 pages)
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3.13
3.14
28/41
t
Bit D7 of Clock Register 04h contains the t
continuation of the deselect time after V
time before WRITEs may again be performed to the device after a power-down condition.
The t
Initial power-on defaults
Upon initial application of power to the device, the following register bits are set to a '0' state:
Watchdog Register, FT, AFE, ABE, SQWE, and TR. The following bits are set to a '1' state:
ST, OUT, and HT (see
Table 6.
1. Default Setting
Table 7.
1. WDS, BMB0-BMB4, RB0, RB1.
2. State of other control bits undefined.
3. UC = Unchanged
Initial Power-up
Subsequent Power-up
(with battery back-up)
rec
t
rec
rec
bit
bit (TR)
Condition
Bit will allow the user to set the length of this deselect time as defined by
0
0
1
t
Default values
rec
(2)
definitions
(3)
STOP bit (ST)
Table
TR
UC
X
0
1
0
7).
UC
ST
1
HT
CC
1
1
rec
reaches V
Min
96
40
50
Out
UC
Bit (TR). t
1
t
rec
FT
0
0
PFD
time
rec
. This allows for a voltage settling
AFE ABE SQWE
refers to the automatic
0
0
200
2000
Max
98
(1)
0
0
0
0
Watchdog
register
Units
ms
ms
µs
Table
0
0
(1)
6.
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