ISL5216_05 INTERSIL [Intersil Corporation], ISL5216_05 Datasheet - Page 19

• Manufacturer Part Number: ISL5216_05
• Description: Four-Channel Programmable Digital DownConverter
• Manufacturer: INTERSIL [Intersil Corporation]

Instruction Bit Fields
POSITIONS
17:15
14:9
BIT
8:0
Steps per FIR
FUNCTION
Instruction
FIR Type
19
Instruction Field Bit Mapping
Bit
Type
WAIT
FIR
JUMP
(NOPs and loading the loop counter are special cases of the FIR instruction).
FIR Parameter Bit Fields
14:9
000000
000001
000010
000011
000100
000101
001000
001001
100000
NOTES:
14. Regular interpolation FIRs are successive runs of a FIR with no data address increment, but with
15. Decimating HBFs are even symmetric, odd number of taps but with different data step sizes.
16. U/C FIR is a normal FIR with the U/C bit enabled.
17. Other codes may be added in the future.
Specifies the number of steps per FIR instruction sequence (load with value minus 1)
(set to 0 for all FIR types except complex which is set to 1).
XXXX
JJJJJ
Start
IncrRS
DecrSel = selects between two decrement values for the wait counter.
DecrEn
LdLp
DecrLp
EnU/C
CCC
000
001
010
011
100
101
110
111
coefficient start address increments.
8
0
0
1
= ignored.
= jump destination (sequence step number).
= condition code.
= ! (waitcount ≥ threshold) -- See IWA = *00Ch, bits 9:0 for threshold details.
= waitcount ≥ threshold -- See IWA = *00Ch, bits 9:0 for threshold details.
= loop counter ≠ 0.
= loop counter = 0.
= ! (RSCO)
= RSCO.
= sync (if enabled) or µP controlled bit.
= always.
= load parameters and start filter computation, set to zero for no-ops, loop counter loads.
= increment resampler during this filter.
= decrement wait count on starting this instruction.
= load loop counter with the data in the I(20:9) bit field.
= decrement loop counter on starting this instruction.
= enable U/C counter with this FIR.
FIR type.
NOP.
Decimating FIR, Even Symmetric, Even # Taps.
Decimating FIR, Even Symmetric, Odd # Taps.
Decimating FIR, Odd Symmetric, Even # Taps.
Decimating FIR, Odd Symmetric, Odd # Taps.
Decimating FIR, Asymmetric.
Resampling FIR, Asymmetric.
Interpolating HBF.
Decimating FIR, Complex (Asymmetric).
Increments on start or at each FIR output depending on µPcontrol bit.
The start bit should not be set when this bit is set.
This multiplies the data by 1, j, -1, -j.
The multiplication factor changes each time the filter runs.
INSTRUCTION BIT FIELDS
7
0
1
J
ISL5216
(RSCO - resampler NCO carry output).
6
X
Start
J
5
X
IncrRS
J
DESCRIPTION
4
X
DecrSel DecrEn
J
3
X
J
2
C
LdLp
C
1
C
DecrLp
C
0
C
EnU/C
C
July 8, 2005