MAX5195EGM MAXIM [Maxim Integrated Products], MAX5195EGM Datasheet - Page 14

• Manufacturer Part Number: MAX5195EGM
• Description: 14-Bit, 260Msps High-Dynamic Performance DAC
• Manufacturer: MAXIM [Maxim Integrated Products]

Grounding and power-supply decoupling can strongly
influence the performance of the MAX5195. Unwanted
digital crosstalk can couple through the input, refer-
ence, power supply, and ground connections, thus
affecting dynamic performance. Proper grounding and
power-supply decoupling guidelines for high-speed,
high-frequency applications should be closely followed.
This reduces EMI and internal crosstalk, which can also
affect the dynamic performance of the MAX5195.
Use of a multilayer printed circuit (PC) board with sepa-
rate ground and power-supply planes is recommend-
ed. High-speed signals should be run on lines directly
above the ground plane. Since the MAX5195 has sepa-
rate analog and digital ground buses (AGND and
DGND, respectively), the PC board should have sepa-
rate analog and digital ground sections with only one
14-Bit, 260Msps High-Dynamic
Performance DAC
Figure 8. Decoupling and Bypassing Techniques for MAX5195—Typical Operating Circuit
14
2.4V
1.6V
Grounding, Bypassing, and Power-Supply
0.1µF
______________________________________________________________________________________
260MHz,
LVPECL
1µF
2V
3.83kΩ
CLKN
CLKP
1.5µF
REFOUT
REFIN
RSET
REFERENCE
1.2V
3kΩ
Considerations
AMPOUT
5V
D0N/D0P–D13N/D13P
BIAS
INPUT LATCH
10µF
CURRENT-SOURCE
INPUT REGISTER
14
ARRAY
DECODER
0.1µF
NETWORK
point connecting the two planes. Digital signals should
run above the digital ground plane and analog signals
above the analog ground plane. Digital signals should
be kept as far away from sensitive analog inputs, refer-
ence input lines, and clock inputs. Digital signal paths
should be kept short and run lengths matched to avoid
propagation delay mismatch.
The MAX5195 has two separate power-supply inputs
for analog (AV
should be decoupled with parallel ceramic chip capac-
itors of 10µF in parallel with 0.1µF and 47pF with these
capacitors as close to the supply pins as possible and
their opposite ends with the shortest possible connec-
tion to the ground plane (Figure 8). The DV
should also have separate 10µF in parallel with 0.1µF
and 47pF capacitors adjacent to their respective pins.
Try to minimize the analog and digital load capaci-
tances for proper operation.
R2R
47pF
DGND
DV
CC
OUTN
CC
AGND
OUTP
AV
CC
) and digital (DV
27.4Ω
27.4Ω
MAX5195
47pF
CC
AGND
AGND
). Each AV
0.1µF
V
OUT
AGND
10µF
CC
CC
5V
input
pins