AD15452/PCB AD [Analog Devices], AD15452/PCB Datasheet

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AD15452/PCB

Manufacturer Part Number
AD15452/PCB
Description
12-Bit 65 MSPS Quad A/D Converter with Integrated Signal Conditioning
Manufacturer
AD [Analog Devices]
Datasheet
FEATURES
12-bit, 65 MSPS, quad, analog-to-digital converter
Differential input with 100 Ω input impedance
Full-scale analog input: 296 mV p-p
200 MHz, 3 dB bandwidth
SNR @ −9 dBFS
SFDR @ −9 dBFS
475 mW per channel
Quad LVDS outputs
Data clock output provided
Offset binary output data format
APPLICATIONS
Antijam GPS receivers
Wireless and wired broadband communications
Communications test equipment
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
64 dBFS (70 MHz AIN)
64 dBFS (140 MHz AIN)
81 dBFS (70 MHz AIN)
73 dBFS (140 MHz AIN)
PDOWN
IN_B
IN_A
CLK
LPF
LPF
FUNCTIONAL BLOCK DIAGRAM
12-Bit 65 MSPS Quad A/D Converter with
D+A
D–A
D+B
D–B
Figure 1.
D+C
D–C
D+D
D–D
Integrated Signal Conditioning
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
PRODUCT HIGHLIGHTS
1. Quad, 12-bit, 65 MSPS, analog-to-digital converter with
2. Packaged in a space saving 81-lead, 10 mm x 10 mm chip
GENERAL DESCRIPTION
The AD15452 is a quad, 12-bit, 65 MSPS, analog-to-digital
converter (ADC). It features a differential front-end
amplification circuit followed by a sample-and-hold amplifier
and multistage pipeline analog-to-digital converter. It is
designed to operate with a 3.3 V analog supply and a 3.3 V
digital supply. Each input is fully differential. The input signals
are ac-coupled and terminated in 100 Ω input impedances. The
full-scale differential signal input range is 296 mV p-p.
Four separate 12-bit digital output signals provide data flow
from the ADCs. The digital output data is presented in offset
binary format. A single-ended clock input is used to control all
internal conversion cycles. The AD15452 is optimized for
applications in antijam global positioning receivers and is suited
for communications applications.
integrated analog signal conditioning optimized for antijam
global positioning system receiver (AJ-GPS) applications.
scale package ball grid array (CSP_BGA) and specified over
the industrial temperature range (−40°C to +85°C).
LPF
LPF
© 2005 Analog Devices, Inc. All rights reserved.
IN_C
IN_D
AD15452
www.analog.com

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AD15452/PCB Summary of contents

Page 1

FEATURES 12-bit, 65 MSPS, quad, analog-to-digital converter Differential input with 100 Ω input impedance Full-scale analog input: 296 mV p-p 200 MHz bandwidth SNR @ −9 dBFS 64 dBFS (70 MHz AIN) 64 dBFS (140 MHz AIN) SFDR ...

Page 2

AD15452 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Product Highlights ........................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Electrical Characteristics............................................................. 3 Timing Diagram ........................................................................... 5 Absolute Maximum Ratings............................................................ 6 ESD ...

Page 3

SPECIFICATIONS ELECTRICAL CHARACTERISTICS @ AVDD = DRVDD = PLLVDD = 3.3 V, Encode = 65 MSPS, AIN = −9 dBFS differential input, T Table 1. Parameter RESOLUTION ACCURACY No Missing Codes Offset Error Gain Error Differential Nonlinearity (DNL) Integral Nonlinearity ...

Page 4

AD15452 Parameter APERTURE Aperture Delay ( Aperture Uncertainty (Jitter) POWER SUPPLIES Supply Voltages AVDD DRVDD Supply Currents IAVDD IDRVDD Total Power Dissipation Power-Down Dissipation SIGNAL-TO-NOISE RATIO MHz INPUT f = 110 MHz INPUT f = ...

Page 5

Table 2. Test Levels Test Description Level I 100% production tested. II 100% production tested at 25°C, and sample tested at specified temperatures. III Sample tested only. IV Parameter is guaranteed by design and characterization testing. V Parameter is a ...

Page 6

AD15452 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating AVDD to AGND −0 +3.9 V DRVDD to DRGND −0 +3.9 V DRGND to AGND −0 +0.3 V DRVDD to AVDD −3 +3.9 V ...

Page 7

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 4. Pin Function Descriptions Pin No B3, C3, D2, E1, E2, F2, F3, F4, G3, G4, ...

Page 8

AD15452 TERMINOLOGY Analog Bandwidth Analog bandwidth is the analog input frequency at which the spectral power of the fundamental frequency (as determined by the FFT analysis) is reduced from full scale. Aperture Delay Aperture delay is a ...

Page 9

Offset Matching Expressed in mV. Computed using the following equation: OffsetMatching = OFF − OFF MAX MIN where: OFF is the most positive offset error. MAX OFF is the most negative offset error. MIN Out-of-Range Recovery Time Out-of-range recovery time ...

Page 10

AD15452 TYPICAL PERFORMANCE CHARACTERISTICS 0 –1 –2 –3 –4 –5 –6 –7 –8 –9 10 100 FREQUENCY (MHz) Figure 4. Analog Input Bandwidth 100 110 120 130 ...

Page 11

BACK-OFF (dBFS) Figure 10. SFDR vs. Backoff @ AIN with MHz IN ...

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AD15452 0.2 0.1 0 –0.1 –0.2 0 512 1024 1536 2048 2560 CODE Figure 15. Typical DNL 3072 3584 4096 10 Rev Page 100 FREQUENCY ...

Page 13

THEORY OF OPERATION The AD15452 consists of four high performance ADC channels. Each channel is independent of each other with the exception of a shared internal reference source, VREF, and sample clock. The channels consist of a differential front-end amplification ...

Page 14

AD15452 TIMING Data from each ADC is serialized and provided on a separate channel. The data rate for each serial stream is equal to 12 bits times the sample clock rate, with a maximum of 780 MHz (12 bits × ...

Page 15

... OUTLINE DIMENSIONS 1.70 MAX ORDERING GUIDE Model Temperature Range AD15452BBC −40°C to +85°C AD15452/PCB 10.00 BSC BALL A1 INDICATOR 8.00 BSC SQ TOP VIEW 1.00 BSC BOTTOM VIEW DETAIL A DETAILA 0.30 MIN BALL DIAMETER COMPLIANT WITH JEDEC STANDARDS MO-192-ABC-1. Figure 17. 81-Lead Chip Scale Package Ball Grid Array [CSP_BGA] ...

Page 16

AD15452 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05155-0-10/05(0) Rev Page ...

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