HI5714/6CB INTERSIL [Intersil Corporation], HI5714/6CB Datasheet
HI5714/6CB
Available stocks
Related parts for HI5714/6CB
HI5714/6CB Summary of contents
Page 1
... MSPS. The digital inputs and outputs are TTL compatible, as well as allowing for a low-level sine wave clock input. Ordering Information TEMP. PART RANGE o NUMBER ( C) HI5714/4CB HI5714/6CB HI5714/7CB HI5714/8CB HI5714EVAL 25 HI5714 (SOIC) TOP VIEW D1 1 ...
Page 2
Functional Block Diagram V CCA ANALOG TO DIGITAL OGND 20 6 AGND Typical Application Schematic +5VA CLOCK 3. 1. AGND DGND BNC NOTES: 1. ...
Page 3
Absolute Maximum Ratings -0.3V to +6.0V ...
Page 4
Electrical Specifications V CCA Unless Otherwise Specified (Continued) PARAMETER V OBTC Top Offset Voltage OTTC DIGITAL OUTPUTS ( and O/UF Referenced to OGND) Logic Output Voltage Low Logic Output Voltage High ...
Page 5
Electrical Specifications CCA Unless Otherwise Specified (Continued) PARAMETER HI5714 80MHz) CLK Bit Error Rate, BER TIMING (f = 75MHz) See Figures 1, 2 CLK Sampling Delay Output Hold Time Output Delay ...
Page 6
Timing Waveforms CLOCK INPUT ANALOG INPUT DATA (D0-D7) OUTPUTS OE INPUT DIGITAL OUTPUT DIGITAL OUTPUT HI5714 t CPL t CPH SAMPLE SAMPLE N SAMPLE ...
Page 7
Typical Performance Curves -40 -30 -20 - TEMPERATURE ( FIGURE 3. TOTAL I vs TEMPERATURE CC 0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1.0 -40 ...
Page 8
Pin Descriptions PIN NUMBER SYMBOL 1, 2, 12-15 23 AGND 7 V CCA O/UF 16 CLK 17 DGND 18 V CCD 19 ...
Page 9
Detailed Description Theory of Operation The HI5714 design utilizes a folding and interpolating architecture. This architecture reduces the number of com- parators, reference taps, and latches, thereby reducing power requirements, die size and cost. A folding A/D converter operates basically ...
Page 10
CLOCK 3. 1. RESTORE SAMPLE PULSE FIGURE 9. TYPICAL AC COUPLED INPUT WITH DC RESTORE +5VA CLOCK 3. 0.1 1. +5VA OFFSET FIGURE 10. TYPICAL DC ...
Page 11
Timing Definitions Aperture Delay: Aperture delay is the time delay between the external sample command (the rising edge of the clock) and the time at which the signal is actually sampled. This delay is due to internal clock path propagation ...
Page 12
Die Characteristics DIE DIMENSIONS: 134 mils x 134 mils x 19 mils 1 mil METALLIZATION: Type: AlSiCu Å Å Thickness 17k SUBSTRATE POTENTIAL (Powered Up): GND (0.0V) PASSIVATION: Type: Sandwich Passivation* Undoped Silicon Glass ...
Page 13
Small Outline Plastic Packages (SOIC) N INDEX 0.25(0.010) H AREA E - SEATING PLANE - - 0.10(0.004 0.25(0.010 NOTES: 1. Symbols are defined in the “MO ...