AD7291_11 AD [Analog Devices], AD7291_11 Datasheet - Page 23

• Manufacturer Part Number: AD7291_11
• Description: 8-Channel, I2C, 12-Bit SAR ADC with Temperature Sensor
• Manufacturer: AD [Analog Devices]

READING DATA FROM THE AD7291
READING TWO BYTES OF DATA FROM A 16-BIT
REGISTER
Reading the contents from any of the 16-bit registers is a 2-byte
read operation. In this protocol, the first part of the transaction
writes to the register pointer. When the register address has
been set up, any number of reads can be performed from that
particular register without having to write to the address
pointer register again. When the required number of reads
is completed, the master should not acknowledge the final
byte. This tells the slave to stop transmitting, allowing a stop
condition to be asserted by the master. Further reads from
this register can be performed in a future transaction without
having to rewrite to the register pointer.
If a read from a different address is required, the relevant
register address has to be written to the address pointer register
and, again, any number of reads from this register can then be
performed. In the following example, the master device reads
three lots of 2-byte data from a slave device but as many lots
consisting of two bytes can be read as required. This protocol
assumes that the particular register address has been set up by
a single-byte write operation to the address pointer register.
...
S
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
SLAVE ADDRESS
DATA[15:8]
A
Figure 27. Reading Three Lots of Two Bytes of Data from the Conversion Result Register
S = START CONDITION
SR = REPEATED START
P = STOP CONDITION
A = ACKNOWLEDGE
A = NOT ACKNOWLEDGE
1
DATA[7:0]
A
DATA[15:8]
A
P
A
Rev. 0 | Page 23 of 28
DATA[7:0]
Reading two bytes of data from a 16-bit register consists of the
following sequence (see Figure 27):
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. The master receives a second data byte.
11. The master asserts an acknowledge on SDA.
12. The master receives a data byte.
13. The master asserts an acknowledge on SDA.
14. The master receives a second data byte.
15. The master asserts a not acknowledge on SDA to notify the
16. The master asserts a stop condition on SDA to end the
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
read bit (high).
The addressed slave device asserts an acknowledge on SDA.
The master receives a data byte.
The master asserts an acknowledge on SDA.
The master receives a second data byte.
The master asserts an acknowledge on SDA.
The master receives a data byte.
The master asserts an acknowledge on SDA.
slave that the data transfer is complete.
transaction.
A
DATA[15:8]
A
DATA[7:0]
A
...
AD7291