ADV7121KN30 AD [Analog Devices], ADV7121KN30 Datasheet - Page 10

no-image

ADV7121KN30

Manufacturer Part Number
ADV7121KN30
Description
CMOS 80 MHz, Triple 10-Bit Video DACs
Manufacturer
AD [Analog Devices]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADV7121KN30
Manufacturer:
ADI/亚德诺
Quantity:
20 000
ADV7121/ADV7122
More detailed information regarding load terminations for vari-
ous output configurations, including RS-343A and RS-170, is
available in an Application Note entitled “Video Formats &
Required Load Terminations” available from Analog Devices,
publication no. E1228–15–1/89.
Figure 3 shows the video waveforms associated with the three
RGB outputs driving the doubly terminated 75
ure 5a. As well as the gray scale levels, Black Level to White
Level, the diagram also shows the contributions of SYNC and
BLANK for the ADV7122. These control inputs add appropri-
ately weighted currents to the analog outputs, producing the
specific output level requirements for video applications.
Table Ia. details how the SYNC and BLANK inputs modify
the output levels.
Gray Scale Operation
The ADV7121/ADV7122 can be used for stand-alone, gray
scale (monochrome) or composite video applications (i.e., only
one channel used for video information). Any one of the three
channels, RED, GREEN or BLUE can be used to input the
digital video data. The two unused video data channels should
be tied to logical zero. The unused analog outputs should be
terminated with the same load as that for the used channel. In
other words, if the red channel is used and IOR is terminated
with a doubly terminated 75
should be terminated with 37.5
Video Output Buffers
The ADV7121/ADV7122 is specified to drive transmission line
loads, which is what most monitors are rated as. The analog
output configurations to drive such loads are described in the
Analog Interface section and illustrated in Figure 5. However,
in some applications it may be required to drive long “transmis-
sion line” cable lengths. Cable lengths greater than 10 meters
can attenuate and distort high frequency analog output pulses.
The inclusion of output buffers will compensate for some cable
distortion. Buffers with large full power bandwidths and gains
between 2 and 4 will be required. These buffers will also need
to be able to supply sufficient current over the complete output
voltage swing. Analog Devices produces a range of suitable op
amps for such applications. These include the AD84x series of
monolithic op amps. In very high frequency applications (80 MHz),
the AD9617 is recommended. More information on line driver
buffering circuits is given in the relevant op amp data sheets.
Figure 6. Input and Output Connections for Stand-Alone
Gray Scale or Composite Video
VIDEO
INPUT
ADV7121/ADV7122
R0
R9
G0
G9
B0
B9
GND
load (37.5 ), IOB and IOG
IOR
IOG
IOB
resistors. See Figure 6.
37.5
37.5
DOUBLY
TERMINATED
75 LOAD
load of Fig-
–10–
Use of buffer amplifiers also allows implementation of other
video standards besides RS-343A and RS-170. Altering the gain
components of the buffer circuit will result in any desired video
level.
PC Board Layout Considerations
The ADV7121/ADV7122 is optimally designed for lowest noise
performance, both radiated and conducted noise. To comple-
ment the excellent noise performance of the ADV7121/ADV7122
it is imperative that great care be given to the PC board layout.
Figure 8 shows a recommended connection diagram for the
ADV7121/ADV7122.
The layout should be optimized for lowest noise on the
ADV7121/ADV7122 power and ground lines. This can be
achieved by shielding the digital inputs and providing good de-
coupling. The lead length between groups of V
pins should by minimized so as to minimize inductive ringing.
Ground Planes
The ADV7121/ADV7122 and associated analog circuitry,
should have a separate ground plane referred to as the analog
ground plane. This ground plane should connect to the regular
PCB ground plane at a single point through a ferrite bead, as il-
lustrated in Figure 8. This bead should be located as close as
possible (within 3 inches) to the ADV7121/ADV7122.
The analog ground plane should encompass all ADV7121/
ADV7122 ground pins, voltage reference circuitry, power sup-
ply bypass circuitry, the analog output traces and any output
amplifiers.
The regular PCB ground plane area should encompass all the
digital signal traces, excluding the ground pins, leading up to
the ADV7121/ADV7122.
Power Planes
The PC board layout should have two distinct power planes,
one for analog circuitry and one for digital circuitry. The analog
power plane should encompass the ADV7121/ADV7122 (V
and all associated analog circuitry. This power plane should be
connected to the regular PCB power plane (V
point through a ferrite bead, as illustrated in Figure 8. This bead
should be located within three inches of the ADV7121/ADV7122.
The PCB power plane should provide power to all digital logic
on the PC board, and the analog power plane should provide
power to all ADV7121/ADV7122 power pins, voltage reference
circuitry and any output amplifiers.
The PCB power and ground planes should not overlay portions
of the analog power plane. Keeping the PCB power and ground
planes from overlaying the analog power plane will contribute to
a reduction in plane-to-plane noise coupling.
TERMINATION)
IOR, IOG, IOB
DACs
(SOURCE
Z
S
Z
= 75
2
Figure 7. AD848 As an Output Buffer
2
3
AD848
+V
–V
7
4
S
S
Z
1
0.1 F
0.1 F
6
75
GAIN (G) = 1+ ––
Z
(CABLE)
O
Z
Z
= 75
1
2
CC
AA
) at a single
and GND
Z
(MONITOR)
REV. B
L
= 75
AA
)

Related parts for ADV7121KN30